Sep 28, 2015 -- The Design and Verification Conference (DVCon) & Exhibition Europe is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, design & verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design.
The conference will be held on Wednesday November 11th and Thursday November 12th, 2015 at the Holiday Inn Munich City Center, Hochstrasse 3, 81669 Munich, Germany.
The Preliminary Technical Program is now available, covering the following themes:
- System Level Design & Verification
- Advanced Verification & Validation
- Design for Functional Safety
- IP Reuse and Design Automation
- Analog and Mixed-Signal Design & Verification
- Lower Power Techniques
DVCon Europe has selected high quality papers, tutorials and posters around best practices and user experiences on design and verification in SystemC, SystemVerilog, PSL, UVM, UPF, IP-XACT, and more.
The Highlights of DVCon Europe 2015 are:
- Leading Industry Keynote Speaker: Hans Adlkofer, Vice President Automotive System Group, Infineon Technologies
- 15 tutorials moderated by user companies, tool providers and training partners
- Technical program covering 36 papers
- Multiple tracks presenting 26 papers and a poster session hosting 10 posters
- Exhibition show with demos from training partners, design tool and IP service providers
- Gala Dinner included as part of the conference
ACCELLERA GLOBAL SPONSORS: ARM, Cadence, Intel, Mentor Graphics, Synopsys