Cadence Announces Collaboration with TSMC on IoT IP Subsystem

SAN JOSE, Calif., June 8, 2015 — (PRNewswire) —  Cadence Design Systems, Inc. (NASDAQ: CDNS), today announced that it is collaborating with TSMC on the development of an Internet of Things (IoT) intellectual property (IP) subsystem demonstration platform for TSMC's ultra-low power (ULP) process. Targeting wearable, home automation, always-on and industrial control applications, this IP subsystem, with the support of the Cadence® suite of digital and custom/analog tools, provides the opportunity to simplify IoT designs and accelerate the time to market for mutual customers.

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Initially targeting the TSMC 55ULP process, the flexible Cadence IoT IP subsystem includes the Cadence Tensilica® Fusion digital signal processor (DSP), analog interfaces, peripheral and sensor interfaces. The flexibility of the subsystem will also allow users the option to select an applications processor if needed for their design. This Cadence IoT IP subsystem can also be implemented in 40ULP and 28ULP as additional performance is needed for more compute intensive applications in the future. Many of the 200+ Cadence Tensilica processor licensees are already designing and producing SoCs and end products in IoT applications; such products include WiFi/IoT connectivity chips, motion plus voice sensor fusion devices, and wearables including smart watches. Some of these next generation devices may be implemented in TSMC 55ULP over the next twelve months as the IP enablement gets more mature.

Cadence's Fusion DSP includes configurable options for security algorithm acceleration, wireless communications protocol processing, and ultra-low power voice trigger. The Fusion DSP includes configurable I/O interfaces that allow direct connection to sensor interfaces and I2C and I2S serial interface controllers. The Fusion DSP, including TSMC reference flow scripts and companion software development tools, is available now.

"With our extensive library of processor, analog, memory, and interface IP, Cadence is in a unique position to team with TSMC to create IP subsystems that give designers the ability to rapidly develop creative IoT and consumer application SoCs," said Martin Lund, senior vice president and general manager of the IP Group at Cadence.

"By collaborating with Cadence on the development of this IoT IP subsystem, we are enabling our mutual customers to quickly take advantage of the ultra-low power benefits of the 55 ULP process for their innovative designs," said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division.

Cadence processor IP and interface IP for TSMC's portfolio of process technologies is available now.  For more information on Cadence IP, visit

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at

© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, Tensilica and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

This press release contains certain forward-looking statements, including expectations for technology and product development and release timelines, availability, and performance that are based on our current expectations and involve numerous risks and uncertainties that may cause these forward-looking statements to be inaccurate. Risks that may cause these forward-looking statements to be inaccurate include among others: our product releases may be delayed, our collaboration with partners may change, or the other risks detailed from time-to-time in our Securities and Exchange Commission filings and reports, including, but not limited to, our most recent quarterly report on Form 10-Q. We do not intend to update the information contained in this news release.

For more information, please contact:
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Cadence Design Systems, Inc.
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