June 2, 2015, Brno, Czech Republic, and San Jose, CA -- Codasip today announced the ASIP Design Network (ADN) - a rich ecosystem spanning service providers, IP companies and embedded software suppliers - to accelerate adoption of Application Specific Instruction-set Processors (ASIPs) for IoT and SoC designs.
New IoT and SoC designs are breaking traditional approaches to embedded processing due to extreme power and performance requirements. ASIPs enable unmatched power efficiency, performance, and flexibility but until now adoption has been hampered by proprietary SDKs (Software Development Kits), complex support, and the lack of a broad ecosystem. The unique open approach to ASIP design enabled by Codasip, together with this new ecosystem, will enable every design to take advantage of ASIP technology, and deliver the power of ASIP with the simplicity of standard embedded processors.
Companies working with the ASIP Design Network include Brite Semiconductor, CAST, GreenSoC’s, Humanchips, Iconda, Intrinsix, InveaTech, Mentor Graphics, Methods2Business, Sezer Technologies and Synkom.
"As a leading chip design services company, our customers are very excited about the advances offered by Codasip ASIP technology. Particularly those customers in IoT, mobile electronics, and wearable technology are very interested in the combination of flexibility, power savings, low cost, and of course the performance offered by application specific optimizations." said Jim Gobes, CEO of Intrinsix. "We are excited to be part of the Codasip ASIP Design Network - a network which will enable Intrinsix to leverage the unique combination of Codasip technology and our knowledge of highly integrated custom processor design."
"IoT business is thriving and bringing more opportunities every day.” said John Zhuang , CTO of Brite Semiconductor. “To support this we are developing our own IoT platform to drastically decrease customers time-to-market. Thanks to Codasip technology and the ASIP Design Network, we will be easily able to meet our customers PPA (Power-Performance-Area) requirements.”
SoCs combine a rich set of subsystems, each of which requires a processor optimized to its unique needs. In IoT devices where battery power is likely measured in months or years, using inefficient general purpose processors is not a viable option.
"ASIPs offer opportunities for optimizing power and performance in industry leading IP like our 802.11ah subsystems." said Marleen Boonen, CEO of Methods2Business. "We are always looking for ways to improve our product offerings and the ASIP Design Network offers an open approach to collaboration, allowing us to bring new levels of efficiency and flexibility to our customers."
“InveaTech delivers the highest performance high-speed network processing solutions targeted to FPGA designs.” said Petr Kastovsky, Department Director of InveaTech. “However, many customers have been looking for a more software-like design flow, and adoption of ASIPs into our solutions allows us to do just that. Thanks to the abstraction offered by Codasip and the openness of the ASIP Design Network we can now easily target both FPGAs and ASIC applications of our technology.”
The ASIP Design Network includes member companies across a range technologies and enabled by a platform of tools and IP. Codasip solutions use a high level ASIP model to automatically generate high performance implementations, a virtual platform and an open-source LLVM/GNU based SDK enabling designers to work with a familiar and freely redistributable environment.
“ASIPs have long been critical to specialized applications, but we believe widespread adoption has been limited by the lack of an ecosystem built on open technology.” said Karel Masarik, CEO Codasip. “IoT designs are rapidly breaking the traditional embedded processor model, and ASIPs are the ideal technology for many of these applications. Codasip solutions have always been built around openness, and with the help of our ASIP Design Network partners ASIP will move from niche to mainstream processing.”
The ASIP Design Network complements the existing ASIP Education Network (AEN), a program that for several years has worked to promote ASIP technology in both research and education.
To learn more about the ASIP Design Network, ASIP Technology, or Codasip’s products please visit us at the Design Automation Conference in San Francisco, June 8th, 9th and 10th at Booth #1814, or online at www.codasip.com
Codasip delivers leading-edge IP and EDA tools that enable adoption of Application Specific Instruction-set Processors (ASIPs). ASIP's utilize dedicated instructions/architecture to accelerate software and are at the heart of applications that require very high performance with low power. Codasip's unique technology makes ASIP adoption as simple and easy as standard embedded processor cores. Formed in 2006 and headquartered in Brno, Czech Republic, Codasip currently has offices in the US and Europe. More information on Codasip's products and services is available at www.codasip.com.
Codasip is the trademark Codasip Ltd and is registered in the United States.
For further information please contact:
VP Marketing & Business Development,
+1 650 353 7486,