FREMONT, Calif., May 12, 2015 – ClioSoft, Inc., a leader in system-on-chip (SoC) design data and intellectual property (IP) management solutions for the semiconductor design industry, will showcase its SOS design data management platform at the IEEE MTT-S International Microwave Symposium (IMS) in Phoenix from May 17th to 22nd in Phoenix, AZ. To enable designers dispersed across multiple design centers to increase productivity and efficiency in their complex design flows, SOS is integrated with tools from various EDA vendors. SOS provides a cohesive design environment for all types of RF, digital, analog and mixed-signal designs. EDA providers include, among others, Keysight Technologies, Cadence Design Systems®, Mentor Graphics and Synopsys.
The SOS design data management platform is tightly integrated into major design flows to empower design engineers to manage data directly from their familiar design cockpits.
The IEEE MTT-S International Microwave Symposium is the premier annual international meeting for technologists involved in all aspects of RF and microwave theory and practice. ClioSoft will demonstrate the SOS platform, which provides SoC design data and IP management to streamline the design process. SOS facilitates multi-site design collaboration and includes, among other features, integrated revision control, release and derivative management and interfaces to commonly-used bug tracking systems. At the Symposium, ClioSoft will showcase how the tight integration of SOS with leading design flows improves design team productivity by providing data management and tool features from the same cockpit. This helps reduce the possibility of design re-spins due to incorrect configurations.
IMS will take place on May 17th to May 22nd, 2015 with the exhibition floor open from May 19th to 21st.
IMS is held in the Phoenix Convention Center, Phoenix, AZ. ClioSoft will be in Booth #208.
ClioSoft’s products will be of interest to RF, digital, and analog designers and to CAD engineers/managers.
ClioSoft Inc. is the pioneer in the field of SoC design configuration management and enterprise IP management solutions for the semiconductor industry. Built exclusively for hardware design engineers, with flexibility to adapt to complex flows, ease of use and robustness as the main drivers, ClioSoft’s SOS Design Collaboration Platform empowers design teams located at multiple sites to collaborate efficiently on complex RF, analog, digital and mixed-signal designs. Using SOS, design teams can streamline the development of complex SoC designs from design specification to tapeout by efficiently sharing and managing their design data across different design centers using a distributed, fault-tolerant architecture. To handle the requirements of complex SoC design flows, the SOS platform is integrated with major EDA flows -- Cadence’s Virtuoso® technology, Keysight Technologies’ Advanced Design System (ADS), Mentor Graphic’s Pyxis Custom IC Design, Synopsys’ Galaxy Custom Designer® and Laker3™ Custom Design.
The sole objective of ClioSoft’s collaborative IP management solution is to improve design reuse within a company. ClioSoft helps semiconductor companies catalog and manage internal and third-party IPs, providing an easy-to-use administration and user cockpit to manage the process of creating IPs and their derivatives, their lineage, IP licensing, security, and issue and defect tracking.
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