Toshiba Launches Low-height Package Low-input Current Drive Transistor Output Photocoupler

TOKYO — (BUSINESS WIRE) — April 27, 2015Toshiba Corporation’s (TOKYO:6502) Semiconductor & Storage Products Company today announced the launch of a low-input current drive transistor output photocoupler in a low-height SO6L package, which can be used to replace conventional DIP4 pin package products. The new product, "TLP383", starts shipments from today.

Toshiba: Low-height Package Low-input Current Drive Transistor Output Photocoupler "TLP383" (Photo:  ...

Toshiba: Low-height Package Low-input Current Drive Transistor Output Photocoupler "TLP383" (Photo: Business Wire)

The new product incorporate Toshiba's original high output infrared LEDs and guarantee the same CTR (Current Transfer Ratio) at 0.5mA input current and at 5.0mA input current.

The new photocoupler has a low height of 2.3mm (max), an approximately 45% reduction from Toshiba conventional DIP4 package products. At the same time, the new product has an isolation specification equivalent to DIP4 wide lead type package products and guarantees a creepage and clearance distance of 8mm (min), and isolation voltage of 5000Vrms (min). With its low height, the “TLP383” can be used in situations where there are strict height restrictions, such as on motherboards, and contribute to the development of smaller sets. It can be used for applications including inverter interfaces and general-purpose power supplies.

           

Key Specifications of New Product

Part Number   TLP383
Current Transfer Ratio (CTR [Note]) 50 to 600%@IF=0.5mA /5mA, VCE=5V
Turn-off Time(tOFF 30μs (typ) @IF=1.6mA, VCC=5V, RL=4.7kΩ
Operating Temperature Range(T opr -55 to 125˚C
Isolation Voltage(BV 5000 Vrms
Safety Standard   UL, cUL, VDE, CQC

[Note] Corresponds to each CTR rank, such as GR and GB. Please check the datasheet for details.


1 | 2  Next Page »



Review Article Be the first to review this article
Downstream : Solutuions for Post processing PCB Designs

Featured Video
Jobs
Principle Electronic Design Engr for Cypress Semiconductor at San Jose, CA
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, PA
Senior Formal FAE Location OPEN for EDA Careers at San Jose or Anywhere, CA
Design Verification Engineer for intersil at Morrisville, NC
ASIC Hardware Engineer for BAE Systems Intelligence & Security at Arlington, VA
Upcoming Events
IPC APEX EXPO 2018 at San Diego Convention Center San Diego CA - Feb 24 - 1, 2018
DVCon US 2018 at Double Tree Hotel San Jose CA - Feb 26 - 1, 2018
5th EAI International Conference on Big data and Cloud Computing Challenges at Vandalur, Kelambakkam high road chennai Tamil Nadu India - Mar 8 - 9, 2018
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: IoTPLL



Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise