MEDIA ALERT: ProPlus Design Solutions to Demonstrate NanoSpice Giga for Memory Verification, Signoff at TSMC 2015 Technology Symposia in San Jose, Boston, Austin

SAN JOSE, CA -- (Marketwired) -- Mar 31, 2015 -- ProPlus Design Solutions, Inc., the leading SPICE modeling, giga-scale SPICE simulation and Design-for-Yield (DFY) solution provider

WHAT: Will demonstrate NanoSpice Giga, a fast and accurate SPICE simulator for memory verification and signoff with the capacity to handle one-billion elements, at the North America TSMC 2015 Technology Symposia in San Jose, Calif., Boston and Austin, Texas. Fully compatible with SPICE and FastSPICE, NanoSpice Giga offers accurate timing, power and leakage for memory IP and full-chip verification, and memory characterization.

WHEN and WHERE:
Tuesday, April 7
San Jose McEnery Convention Center, San Jose, Calif.

Tuesday, April 14
Boston Marriott Burlington, Burlington, Mass.

Thursday, April 16
Hilton Austin, Austin, Texas

For more information about ProPlus Design Solutions, visit www.proplussolutions.com

Details on the TSMC 2015 Technology Symposia can be found at: http://tiny.cc/izy0vx

About ProPlus Design Solutions
ProPlus Design Solutions, Inc. delivers Electronic Design Automation (EDA) solutions with the mission to enhance the link between design and manufacturing. As the SPICE modeling solutions leader and leading technology provider of giga-scale SPICE simulation and design for yield (DFY) applications, it provides unique DFY solutions integrating the most advanced device modeling, a high-performance parallel SPICE simulation engine and hardware-validated variation analysis technologies. Founded in 2006, ProPlus Design Solutions has R&D centers in San Jose, Calif., Beijing and Jinan, China, and offices in Tokyo, Japan, Hsinchu, Taiwan, and Shanghai, China. More information about ProPlus Design Solutions can be found at www.proplussolutions.com.

BSIMProPlus, Model Explorer, NanoExplorer, NanoSpice, NanoYield and NoisePro are registered trademarks of ProPlus Design Solutions. ProPlus Design Solutions acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

For more information, contact:
Nanette Collins
Public Relations for ProPlus Design Solutions 
(617) 437-1822 

Email Contact 





Review Article Be the first to review this article
Aldec Webinar Nov 30

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Computer History Museum: the Future of War is Here
More Editorial  
Jobs
Senior SW Developer for EDA Careers at San Jose, CA
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
ASIC Design Engineer for Infinera Corp at Sunnyvale, CA
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
REVISED***Director Product Line RF/IC for EDA Careers at San Jose, CA
Upcoming Events
“Empowering Leadership with WIT and WISDOM” at SEMI 673 South Milpitas Blvd. Milpitas CA - Nov 28, 2017
Artificial Intelligence and Convolution Neural Networks Discussion at San Jose State University Student Union Theater San Jose CA - Dec 4, 2017
Silicon Valley's Only Comprehensive Embedded Systems Conference at San Jose Convention Center 150 W. San Carlos St. San Jose CA - Dec 5 - 7, 2017
Oski Technology’s Decoding Formal Club Meeting at The Conference Center San Jose CA - Dec 7, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise