Freescale Speeds SoC Implementation Time by 7X with Cadence Innovus Implementation System

SAN JOSE, Calif., March 10, 2015 — (PRNewswire) —  Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Freescale® Semiconductor has achieved a 7X gain in turnaround time with Cadence® Innovus™ Implementation System over its previous production environment while maintaining its quality of results. The gains were achieved on multiple ~3M-instance 28-nanometer (nm) designs for networking applications, which will help the embedded processing solutions company significantly boost engineering productivity and accelerate time to market.

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Freescale leveraged the Innovus Implementation System full-flow multi-objective technology that enables concurrent electrical and physical optimization, to avoid local optima while achieving excellent quality of results and comparable improvements in power, performance and area (PPA). The Innovus Implementation System is equipped with core algorithms that have been enhanced with pervasive multi-threading throughout the full flow, which provided Freescale with significant speedup on industry-standard hardware with 8 to 16 CPUs.

"We've tested the full Innovus Implementation System flow on some of our most congestion-challenged 28nm networking IP blocks and have achieved excellent results while seeing significant throughput improvements," said Fares Bagh, vice president, hardware and architecture engineering in Freescale's Digital Networking Group. "The new Cadence solution has enabled us to resolve our most difficult timing requirements, and we anticipate that our deployment will allow us to grow our IP block sizes and accelerate SoC-level design closure."

"By achieving a 7X turnaround time gain, Freescale can deliver networking application designs to market faster and gain a leg up on the competition," said Dr. Anirudh Devgan, senior vice president of the Digital and Signoff Group at Cadence. "The new advanced placement and optimization capabilities in the Innovus Implementation System enabled Freescale Semiconductor to readily hit their challenging design targets while also gaining a significant runtime advantage."

The Innovus Implementation System is a massively parallel physical implementation solution that delivers best-in-class quality of results with unprecedented speed and capacity. For more information on the new solution, please visit http://www.cadence.com/news/innovus. Also, see today's related press release titled, "Cadence Introduces Innovus Implementation System, Delivering Best-in-Class Results with Up to 10X Reduction in Turnaround Time," at http://www.cadence.com/cadence/newsroom/press_releases/pages/pr.aspx?xml=031015_Innovus.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at http://www.cadence.com/.

© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are registered trademarks and Innovus is a trademark of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

For more information, please contact:
Cadence Newsroom
408-944-7039
Email Contact

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To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/freescale-speeds-soc-implementation-time-by-7x-with-cadence-innovus-implementation-system-300047126.html

SOURCE Cadence Design Systems, Inc.

Contact:
Cadence Design Systems, Inc.
Freescale Semiconductor
Web: http://www.cadence.com




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