"For our large-scale, high-speed mixed-signal designs, Virtuoso AMS Designer enabled us to utilize chip verification to reduce design turnaround time and to improve the design quality significantly," said Satoshi Ueno, director, Design Engineering Second Dept., Platform Advanced Engineering Operation, Information & Telecommunication Systems Company, Hitachi, Ltd. "In order to extend the design success of our high-end mixed-signal designs at the 28nm node and beyond, we continue to count on the comprehensive solution and extensive support from Cadence."
Virtuoso AMS Designer is a mixed-signal simulation solution for the design and verification of analog, RF, memory, and mixed-signal SoCs. It is integrated with the Virtuoso Analog Design Environment (ADE) for mixed-signal design and verification. It is also integrated with the Cadence Incisive® functional verification platform for mixed-signal verification within the digital verification environment.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at http://www.cadence.com.
© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, Incisive, and Virtuoso are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.
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SOURCE Cadence Design Systems, Inc.
|Cadence Design Systems, Inc.