Renesas Electronics Develops 28nm Embedded Flash Memory Technology That Realizes Even Faster Read and Rewrites Speeds for Automotive Microcontrollers

Achieves Industry's Fastest Random Access Speed of 200 MHz and Write Throughput of 2.0 MB Per Second

TOKYO — (BUSINESS WIRE) — February 25, 2015 — Renesas Electronics Corporation (TSE: 6723), a premier provider of advanced semiconductor solutions, today announced that it has developed a new flash memory technology that achieves even faster read and rewrite speeds. The new technology is designed for on-chip flash memory microcontrollers (MCUs) using a 28-nanometer (nm) embedded Flash (eFlash) process technology.

As a response to recent environmental issues, the regulations on car performance (CO2 emissions, fuel efficiency, and exhaust gasses) in countries around the world are becoming increasingly stricter. As a result, support for new engine control methods is required in the power train area. Furthermore, ADAS (Advanced Driving Assistant System) is now desired to create a safe, secure, and comfortable automotive experience. To respond to these market needs, further increases in performance, and even lower power consumption, are required in the automotive MCUs.

As Renesas announced in its press release issued on February 18, 2014, Renesas has been moving forward with the development of eFlash memory for MCUs that is based on the SG-MONOS structure (Note 1), which has a proven track record in terms of high reliability, high speed, and low power. At the same time as moving from the 40 nm process to the industry's leading-edge 28 nm process, this new technology makes even larger memory capacities and even higher processing performance possible through Renesas' superlative circuit technologies.

Key features of Renesas’ newly-developed flash memory technologies:

(1) Technology that realizes both high-speed readout operations and high reliability
As the feature size of memory cells reduces, the cell current decreases. Although it is possible to assure the sufficient read current by overdriving the word line (memory cell selection gate) voltage, there is concern that the gate oxide reliability could be adversely affected at high temperature. By utilizing the fact that the temperature dependence of memory cell current and the peripheral transistor reliability are in an inverse relationship, a negative temperature dependence has been added to the word line overdrive voltage to improve the reliability lifetime of the peripheral transistors by a factor of over 10 compared to the simple word line overdrive approach. This has resulted in achieving an increase in the random read speed from 160 to 200 megahertz (MHz) as well as high reliability.

(2) Technology that mitigates the erase voltage stress
Renesas has newly developed a technology that mitigates the erase voltage stress to the interlayer dielectric at high temperature by monitoring the erase speed and controlling the erase operation so that the maximum erase voltage is suppressed at high erase speed condition.

This achieves high reliability against high-voltage stress during erase operations, while the dielectric films among high-voltage metal lines and memory cells become thinner associated with the narrower process node.

(3) Technology that increases write speeds
Renesas has newly developed a high-speed write technology that (1) reduces the write pulse duration by applying the negative back bias to the memory cell and (2) enables writing to multiple flash macros in parallel. As a result, Renesas achieved a write throughout of 2.0 MB per second, which is the industry’s fastest write operation in eFlash memory.

(4) Technology that reduces power supply noise and EMI
Since it is expected that the rewrite cycle counts of eFlash memory in the field will increase in the future due to, for example, OTA (over the air) program updates, it is necessary to minimize the influence caused by power supply noise and EMI (Electric Magnetic Interference) on overall system operations during rewrite operations. Therefore, Renesas has now developed a technology that significantly reduces these induced noise by adopting SSCG (spread-spectrum clock generation) for the drive clock of the charge pumps that generates the high voltage used for flash memory rewrite operations.

Renesas has now prototyped both a 4 MB program storage eFlash memory and a 64 KB data storage eFlash memory using a 28 nm eFlash memory process and has achieved the industry's highest readout operation speed of 6.4 GB/s at over 200 MHz. Although previously, Renesas had verified read operations at 160 MHz in a prototype chip fabricated in the 40 nm process, Renesas has now verified 25 percent characteristics improvements thanks to this new technology.

Also, in order to meet the requirement of the higher write performance in accordance with the increase in the size of the program storage eFlash memory, Renesas has achieved the industry's highest write throughput of 2.0 MB/s. This corresponds to almost twice as high performance characteristics as the conventional Renesas products fabricated in the 40 nm generation process technology.

Renesas expects to contribute significantly to achieving high-capacity automotive flash memory that provides both high performance and high reliability by using those eFlash memory circuit technologies.

Renesas announced the new technologies on February 24 at the International Solid-State Circuits Conference (ISSCC) held in San Francisco from February 22 to 26, 2015.

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