DAC Workshop on Performance Modeling & Analysis - Call for Papers
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System-to-Silicon Performance Modeling and Analysis

Power, Temperature and Reliability

DAC 2015 Workshop

June 7, 2015 - San Francisco, CA, USA 

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The integration of heterogeneous electronic systems composed of SW and HW requires not only a proper handling of system functionality, but also an appropriate expression and analysis of various extra-functional properties: timing, energy consumption, thermal behavior, reliability, cost and others as well as performance aspects related to caching, non-determinism, probabilistic effects.

The workshop addresses cross-domain aspects related to the design and verification framework covering methodology, interoperable tools, flows, interfaces and standards that enable formalization, specification, annotation and refinement of functional and extra-functional properties of a system. Special emphasis will be given to formalization and expression of power, temperature, reliability, degradation and aging.

Several research and industry efforts address (parts of) the problem. However, there is a need for community-wide cooperation to establish a holistic vision on extra-functional property treatment, and to agree on research and development directions and further on validation of applicable solutions and standardization.

This event will support collaboration between main actors from system and microelectronics industry, EDA and research.

The workshop is inviting submissions of short abstracts industrial and scientific work in progress and practical solution and experiences.
Main topics (but not limited to)

-          Formalization, specification and modeling of extra-functional properties (e.g. using UML, SysML, MARTE, …) and multi-physics specification of timing, power, temperature, reliability and aging properties from system level, transactional level, to implementation.

-          Domain-specific languages and formalisms; system-level design languages (e.g. C++, SystemC, SystemVerilog, …) and extensions to express extra-functional properties

-          Tracing of extra-functional properties during simulation and run-time

-          Model of computation extensions for non-determinism, probability analysis, caching, timing, power, temperature, reliability, …

-          System performance and design space exploration using abstract modelling and analysis (e.g. virtual prototyping, …)

-          Multi-physics simulation challenges: speed vs. accuracy, fidelity

-          Power and performance estimation, analysis and measurement techniques

-          Temperature measurement, abstraction, modeling and analysis techniques

-          Power and temperature aware scheduling & real-time analysis

-          System level reliability and aging models

-          Reliability from transistor to RTL level: e.g. NBTI models including basic physical properties

-          Design for Aging and Reliability

-          Performance objectives validation, including metrics (across abstraction levels) and formal checking of extra-functional properties (e.g. using contract-based design techniques)

-          Evolution and extensions of standards like UPF, IP-XACT to express extra-functional properties

-          Industrial case-studies, state-of-the-art EDA tools including identification of challenges and gaps



Authors are encouraged to outline their work in progress as short abstracts (up to one page). Submitted proposals are required to describe original unpublished work.

Proposals should be submitted electronically in text or PDF format to office@ecsi.org

Workshop proceedings of the accepted abstracts and presentations will be distributed to all participants of the event and made available through the ECSI web site. Note that the paper presented at the workshops are NOT disseminated through the official DAC proceedings or through any other formal channels, such as, for example, the IEEExplore or the ACM Digital Library.

Important deadlines

·          Submission deadline:       March 15, 2015                              

·         Notification of acceptance:       March 20, 2015                     

·         Preliminary program published:    March 26, 2015              

·         Final papers due:       May 15, 2015

·         Workshop:                June 7, 2015                                    

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