Supports eMMC 5.0 from JEDEC, for high performance embedded flash memory systems
Sunnyvale (CA), 5 Feb 2015: eInfochips, a leading Product Engineering Services company has announced the availability of the eMMC 5.0 Verification IP (VIP). Companies designing the next generation embedded flash memory systems can improve the reliability and performance of their products using the eInfochips eMMC 5.0 VIP. The eMMC 5.0 will accelerate RTL verification cycles of JEDEC standards compliant devices for mobiles, tablets and other consumer devices. In line with the Verification IP, eInfochips also offers ASIC and FPGA verification services for companies in the storage industry.
eInfochips eMMC 5.0 VIP
The eMMC 5.0 VIP enables design and verification engineers to extensively test the functionality of embedded memory systems. Verification Models and Compliance Test Suites are developed in SystemVerilog (SV) and support UVM environment. The verification architecture includes key modules like the Host Controller and the eMMC device Controller.
The VIP bundles in deliverables like Sample Use Cases, Sanity Test Cases, Verification Environment (to be integrated) and the User Guide.
eInfochips VIP Development and Verification Practice
eInfochips has developed 32 complex VIPs for top global EDA companies and end-customers. Their experience includes VIPs for the latest high-speed and low-power protocol standards, like MIPI, SERDES, USB 3.0, DDR3, HDMI and eMMC. Today, eInfochips has contributed to VIPs that are deployed by hundreds of customers to bring confidence to their ASIC, SOC and FPGA designs.
eInfochips is a global product innovation partner recognized for technology leadership by Gartner, Frost & Sullivan, NASSCOM and Zinnov. eInfochips has contributed to 500+ products for top global companies, with more than 10 million deployments across the world.