First shipments of Virtex UltraScale VU440 FPGA ideal for next-generation ASIC and Complex SOC prototyping and emulationSAN JOSE, Calif., Jan. 15, 2015 — (PRNewswire) — Xilinx, Inc. (NASDAQ: XLNX) today announced that it has delivered the industry's first 4M logic cell device which offers >50M equivalent ASIC gates and 4X more capacity than competitive alternatives. First shipments of the Virtex® UltraScale™ VU440 FPGA are ideal for next-generation ASIC and complex SOC prototyping and emulation. With a capacity of 50 million equivalent ASIC gates and the industry's highest I/O count, the Virtex UltraScale VU440 FPGA leverages the UltraScale architecture's ASIC-like clocking, next-generation routing, and logic block enhancements to deliver best in class utilization, making it ideal for ASIC prototyping and large scale emulation.
"By being the first to receive samples of the Virtex UltraScale VU440 device, we are able to accelerate HAPS FPGA-based prototyping development to ensure the earliest availability of a complete solution for our customers," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "The new UltraScale devices combined with HAPS' unique capabilities enable us to deploy our next-generation prototyping systems to satisfy our customers' requirements for higher capacity, increased performance and easier integration."
With the Virtex UltraScale VU440 FPGA, Xilinx continues to break through the limitations of Moore's Law with its second generation SSI-technology. Production qualified at the 28nm node, the SSI technology is built on TSMC's CoWoS (Chip-on-Wafer-on-Substrate) 3D IC process to achieve even greater silicon scaling, as well as power and performance benefits by integrating multiple components on a single device. Along with 5X more inter-die bandwidth and a unified clocking architecture across slice boundaries, UltraScale 3D IC devices deliver a virtual monolithic design experience for fast implementation and design closure.
"The VU440 is a powerful vehicle for prototyping any type of ARM®-based SoC prior to tapeout," said John Goodenough, vice president of engineering systems at ARM. "The capacity and performance of this new FPGA from Xilinx enables multicore prototyping of even the most advanced ARMv8-A architectures, improving hardware and software development schedules, thereby enabling faster time to market for next-generation SoCs."
About Virtex UltraScale VU440 FPGAs
Setting new industry standards, the Virtex UltraScale VU440 device provides unprecedented levels of performance, system integration, and bandwidth on a single chip. As the largest member of the family, it delivers 4.4M logic cells, 1,456 user I/Os, 48 x 16.3 Gb/s backplane-capable transceivers, and 89 Mb of block RAM, breaking previous records by more than doubling the industry's previous highest capacity Xilinx Virtex-7 2000T device.
To see an unprecedented demonstration of 10 ARM Cortex-A9 CPUs executing in a single Virtex UltraScale VU440, please visit www.xilinx.com/virtex-ultrascale.html.
Availability and Tool Support
The Virtex UltraScale VU440 FPGA is shipping now and is supported by Xilinx's industry-leading Vivado® Design Tool Suite. To order, please contact your local Xilinx sales representative.
Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. For more information, visit www.xilinx.com.
© Copyright 2015 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. ARM is a registered trademark of ARM in the EU and other countries. All other trademarks are the property of their respective owners.
Silvia E. Gianelli
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SOURCE Xilinx, Inc.