Altera Demonstrates Industry's Highest Performance DDR4 Memory Data Rates in an FPGA

2,666 Mbps DDR4 Memory Interface in Arria 10 FPGAs and SoCs Optimized for Data-Intensive Applications

SAN JOSE, Calif., Dec. 18, 2014 — (PRNewswire) —  Altera Corporation (Nasdaq: ALTR) today announced it is demonstrating in silicon DDR4 memory interfaces operating at an industry-leading 2,666 Mbps. Altera's Arria® 10 FPGAs and SoCs are the industry's only FPGAs available today that support DDR4 memory at these data rates, delivering a 43 percent improvement in memory performance over previous generation FPGAs and a 10 percent improvement in memory performance over competing 20 nm FPGAs. Hardware designers today can use the latest Quartus® II software v14.1 to enable 2,666 Mbps DDR4 memory data rates in Arria 10 FPGA and SoC designs. A video demonstration showing robust memory interfaces operating at 2,666 Mbps with margin is available for viewing at

Altera(R) programmable solutions enable designers of electronic systems to rapidly and cost effectively innovate, differentiate and win in their markets. Altera offers FPGAs, SoCs, CPLDs, ASICs and complementary technologies, such as power management, to provide high-value solutions to customers worldwide.

Arria 10 FPGAs and SoCs are the industry's highest performance 20 nm FPGAs and SoCs, offering a one speed-grade advantage over competitive solutions. Supporting the industry's highest DDR4 memory performance enables communications, compute and storage, and video processing applications to execute high memory bandwidth in their systems, in a cost-effective, low-power manner. Arria 10 FPGA and SoC memory interfaces support today's leading-edge, high-speed memories, including HMC, DDR4, DDR3, LPDDR3, RLDRAM3, and QDR-IV/ -II+ Xtreme/ -II+/ -II.

"We architected the external memory interfaces in Arria 10 FPGAs and SoCs to provide hardware designers an easy-to-use, high-performance way to get data into and out of the device," said Raj Patel, senior manager, midrange products, Altera Corporation. "By delivering the industry's fastest DDR4 data rates we are able to meet our customers' evolving system requirements which are being driven by the tremendous growth in data volume."

Arria 10 FPGAs and SoCs simplify the development of systems that feature DDR4 memory by integrating a complete physical interface and memory controller into the FPGA. The memory interface is hardened in the FPGA fabric, which delivers higher performance, higher bandwidth and lower power versus a soft implementation. In addition, a hardened memory interface and controller eliminate the need for designers to use logic resources to build the DDR4 memory interface. Altera's Quartus II software v14.1 includes a DDR4 PHY wizard and controller intellectual property (IP), which further simplifies high-performance memory interface design by automatically adapting to DIMMs from a variety of memory suppliers.


Altera is shipping engineering samples of Arria 10 FPGAs today. The latest Quartus II software v14.1 provides expanded support for Arria 10 FPGAs and SoCs. To learn more information about Arria 10 FPGAs and SoCs, visit Quartus II software v14.1 is available for download on

About Altera

Altera® programmable solutions enable designers of electronic systems to rapidly and cost effectively innovate, differentiate and win in their markets. Altera offers FPGAs, SoCs, CPLDs and complementary technologies, such as power management, to provide high-value solutions to customers worldwide.

ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at

Editor Contact:
Steve Gabriel
Altera Corporation
(408) 544-6846 
Email Contact

Logo -


To view the original version on PR Newswire, visit:

SOURCE Altera Corporation

Altera Corporation

Review Article Be the first to review this article


Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Reverie: All That Glitters is not Past
More Editorial  
Digital and FPGA Hardware Designer for Giga-tronics Incorporated at San Ramon, CA
Technical Support Engineer for EDA Careers at Freemont, CA
Senior Physical Design Engineer for Ambiq Micro at Austin, TX
SoC Design Engineer for Intel at Santa Clara, CA
Development Engineer-WEB SKILLS +++ for EDA Careers at North Valley, CA
Upcoming Events
European 3D Summit 2017 at 3, parvis Louis Néel 38054 Grenoble France - Jan 23 - 25, 2017
3D Printing Electronics Conference at High Tech Campus 1, 5656 Eindhoven Eindhoven Netherlands - Jan 24, 2017
DesignCon 2017 at Santa Clara Convention Center Santa Clara CA - Jan 31 - 2, 2017
Embedded Neural Network Summit at San Jose CA - Feb 1, 2017

Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy