Dolphin Integration raises its status of one-stop-shop for IoT devices

Grenoble, France – December 01, 2014 -- The Internet of Things (IoT) with its swarm of smart connected devices has increased the challenges of low-power SoC design. The IoT devices require a drastic limitation of power consumption with a meticulous care of System-on-Chip costs.

Fabless suppliers must strive to reduce power consumption of their SoCs to ensure acceptable battery lifetime for the end-users. However, even when the appropriate foundry process and Silicon IP have been selected, the overall power consumption of SoCs can still be optimized.

Going beyond providing a set of low-power optimized Silicon IP components for the needs of IoT devices, Dolphin Integration addresses the challenge of assembling and verifying the most efficient power management architectures, delivered with the relevant advanced views to enable consistent verifications at SoC level. Finally a number of activity control units for the detailed and safe management of dual voltage and frequency stepping.

Key differentiation of Dolphin Integration’s consistent Silicon IP offering:

  • The CLICK: to build logic, memory and mixed-signal islands for all operating modes thanks to innovative cells
  • Power kit library of regulation components: to build an optimized SoC architecture for the lowest power consumption
  • Ultra low-power ADCs: for activity tracking or always-on voice detection
  • Microcontroller cores ranging from 8051 to 32-bit: for the best trade-off between power consumption and processing power or silicon area

Example of IP Solutions for wearable connected devices at 55 nm

 

For more information contact our Transversal Marketing Manager at Email Contact

 

 

 


Read the complete story ...


Review Article Be the first to review this article
CST: Webinar October 19, 2017

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
DVCon Europe 2017: Munich and So much more
More Editorial  
Jobs
Field Application Engineer for Teradyne Inc at San Jose, CA
Analog Hardware Engineer for Teradyne Inc at San Jose, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
FPGA Engineer for Teradyne Inc at San Jose, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Upcoming Events
Preparing for the Cognitive Era: Education, Occupation and You at SJSU Student Union Theater 211 South 9th Street San Jose CA - Oct 18, 2017
11th International Symposium on Networks-on-Chip (NOCS 2017) at Seoul Korea (South) - Oct 19 - 20, 2017
15th IEEE/ACM ESTIMedia 2017 at Seoul Korea (South) - Oct 19 - 20, 2017
ESTIMedia 2017 at Seoul Korea (South) - Oct 19 - 20, 2017
CST: Webinar series
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise