Grenoble, France – December 01, 2014 -- The Internet of Things (IoT) with its swarm of smart connected devices has increased the challenges of low-power SoC design. The IoT devices require a drastic limitation of power consumption with a meticulous care of System-on-Chip costs.
Fabless suppliers must strive to reduce power consumption of their SoCs to ensure acceptable battery lifetime for the end-users. However, even when the appropriate foundry process and Silicon IP have been selected, the overall power consumption of SoCs can still be optimized.
Going beyond providing a set of low-power optimized Silicon IP components for the needs of IoT devices, Dolphin Integration addresses the challenge of assembling and verifying the most efficient power management architectures, delivered with the relevant advanced views to enable consistent verifications at SoC level. Finally a number of activity control units for the detailed and safe management of dual voltage and frequency stepping.
Key differentiation of Dolphin Integration’s consistent Silicon IP offering:
- The CLICK: to build logic, memory and mixed-signal islands for all operating modes thanks to innovative cells
- Power kit library of regulation components: to build an optimized SoC architecture for the lowest power consumption
- Ultra low-power ADCs: for activity tracking or always-on voice detection
- Microcontroller cores ranging from 8051 to 32-bit: for the best trade-off between power consumption and processing power or silicon area
Example of IP Solutions for wearable connected devices at 55 nm
For more information contact our Transversal Marketing Manager at Email Contact