AMIQ EDA Introduces New Capabilities in Its Verissimo SystemVerilog Testbench Linter

October 14, 2014, Munich, Germany – AMIQ EDA, a pioneer in integrated development environments (IDEs) for hardware design and verification and a provider of platform-independent software tools for efficient code development, today announced the release of new capabilities in the Verissimo linter: rules for identifying and eliminating dead code and an improved report for Pass/Fail checks. These capabilities help engineers further improve code performance and reliability and reduce maintenance costs.

Verissimo SystemVerilog Testbench Linter is a static code analysis tool that allows engineers to accurately identify improper SystemVerilog language, semantics, and styling usage and verification methodology violations. Verissimo can be customized to check specific coding guidelines and as such, it can meet the demands of small teams as well as larger verification groups or global companies. The linter runs both in batch and GUI modes.

A common issue that affects code performance and maintainability is the existence of what in programming is known as dead code. This is source code that is either not executed because there is no control flow path to it or has no effect on the program output [1]. Examples of such code include variables that are never used or functions that are never called. An unused function argument is always pushed on the stack with each function call, and as such, it has an undesired effect on performance. As for maintainability, unused code adds clutter and may confuse users that try to understand, extend or debug existing code.

The new version of Verissimo ( 3.5.24) includes two new rules that help design and verification engineers identify and eliminate dead code:

  1. The Unused Element rule, which checks for unused variables, functions, arguments, classes, tasks, modules, signals, and parameters and other similar elements.
  2. The Unused Macro rule that checks for unused macros.

Dead code analysis is a linting dimension that we are planning to expand with even more rules in order to help users clean their code of unnecessary clutter and improve performance”, said Cristian Amitroaie, AMIQ’s CEO.

In addition to the new rules for dead code analysis, AMIQ also introduced improved HTML reporting of the Pass/Fail checks of a linting session. The new reports come with advanced functionality for searching and filtering failures as well as a couple of usability and formatting enhancements.

On the search side, users can now use file filtering to focus the failure analysis on a specific code section, based on their priorities.  Regarding usability, the new report includes a dashboard that shows an overview of the linting status, including information like pass/fail percentage and top failed checks and files.

The new report format provides the ability to bookmark a specific report section. This can be useful to monitor progress across linting sessions. For example, if a particular failure is of more interest, after filtering and thus focusing the report on this specific check, the user can save a bookmark, fix the code, and then lint again and quickly check the failure status.

The newly improved reporting also enables sharing a relevant report section with colleagues. As such, if further debugging requires collaboration with the team, the bookmark can be sent as a regular web link.

AMIQ EDA is exhibiting at the 1st DVCon Europe, Booth #2, on October 14 –15, 2014, in Munich, Germany. Those attending the show will have the opportunity to see a demo of the new Verissimo linting capabilities, as well as learn more about the DVT Eclipse IDE and Specador Documentation Generator. For more information, please visit


AMIQ EDA focuses on adding value to the design and verification domains through its proprietary code development and analysis tools.  Since 2006, its core solution – Design and Verification Tools (DVT) – the first IDE for the e language, SystemVerilog, and VHDL, has helped engineers increase the speed and quality of code development and simplify maintenance and debugging, enabling them to complete their projects faster. Verissimo SystemVerilog Testbench Linter has been used by verification groups to improve testbench code reliability as well as implement best coding practices and their own specific guidelines. Its most recently launched product, Specador Documentation Generator, which works in batch mode, automatically generates accurate and well-organized documentation from the comments inserted in the source code. For more information about AMIQ EDA and its solutions, visit and

Media Contacts:

Cristian Amitroaie
Email Contact                                   

Corina Mitu
Email Contact

Review Article Be the first to review this article

Featured Video
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, Pennsylvania
Upcoming Events
Methodics User Group Meeting at Maxim Integrated 160 Rio Robles San Jose CA - Jun 5 - 6, 2018
2018 FLEX Korea at Room 402/ 403, COEX Seoul Korea (South) - Jun 20 - 21, 2018
IEEE 5G World FOrum at 5101 Great America Parkway Santa Clara CA - Jul 9 - 11, 2018
SEMICON West 2018 at Moscone Center San Francisco CA - Jul 10 - 12, 2018
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL

Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise