SUNNYVALE, Calif. and MUNICH, Germany – Oct. 8, 2014 –
Real Intent, whose digital verification solutions accelerate electronic design sign-off, eliminate complex failures in systems-on-chip (SoCs), and lead the market in performance, capacity, accuracy and completeness
Will exhibit its Ascent and Meridian productsat the debut of Design & Verification Conference & Exhibition Europe ( DVCon Europe 2014) in Munich, Germany, next week, through its European distribution partner, EuropeLaunch. This new event focuses on the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Ascent products improve QoR and productivity of design teams by finding elusive bugs and getting rid of sources of uncertainty that are difficult to uncover using traditional Verilog or VHDL simulation. Meridian products accelerate sign-off verification of clock domain crossings and SDC in 500M+ gate SoC designs.
Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, systems designers, software developers and IP integrators the latest methodologies, techniques, applications and demonstrations on the practical use of EDA and IP languages and standards used in electronic design. DVCon has expanded to Europe and India this year in addition to the customary U.S. event in Silicon Valley.
Flash Exhibit Table #18 in the corridor during coffee breaks, meals, and evening reception
Oct. 14: 11:00-20:00
Oct. 15: 11:00-16:00
Hilton Munich City
Rosenheimer Strasse 15
81667 Munich, Germany
Tel: +49 (0)89 48 040
About Real Intent
Companies worldwide rely on Real Intent’s EDA software to accelerate early functional verification and advanced sign-off of electronic designs. Real Intent’s comprehensive CDC verification, advanced RTL analysis and sign-off solutions eliminate complex failure modes of SoCs, and lead the market in performance, capacity, accuracy and completeness. Please visit www.realintent.com for more information.
Real Intent and the Real Intent logo are registered trademarks, and Ascent, Meridian and iDebug are trademarks of Real Intent, Inc. All other trademarks and trade names are the property of their respective owners.
Clock Domain Crossing
EDA Electronic Design Automation
IP Intellectual Property
QoR Quality of Results
RTL Register Transfer Level
SDC Synopsys Design Constraints
SoCs Systems on Chip
VHDL Very High-Level Design Language
Sarah Miller for Real Intent
ThinkBold Corporate Communications