Real Intent to Exhibit at SNUG Designer Community Expo in Boston on Sept. 11, 2014

SUNNYVALE, CALIF. – Sept. 4, 2014 –  


Real Intent, whose RTL verification solutions accelerate electronic design sign-off and eliminate complex failures in SoCs.


Will exhibit its Ascent™ and Meridian™ products for SoC sign-off at the Synopsys® Designer Community Expo (DCE) at the Synopsys Users Group (SNUG®) Boston 2014 event next week. At DCE, Real Intent will showcase its Meridian CDC and Ascent X-verification System (XV) software working with Synopsys’ industry-leading VCS® functional verification solution and Synopsys’ Industry-leading, open Verdi® debug solution, as a part of the IC Verification community.  Its Ascent products find elusive bugs and eliminate sources of uncertainty that are difficult to uncover using traditional Verilog or VHDL simulation, leading to both improved QoR and productivity of design teams. The Meridian products accelerate sign-off verification of clock domain crossings and SDC in 500+M gate SoC designs.

The SNUG Designer Community Expo (DCE) is a unique networking event featuring Synopsys and its ecosystem partners from across the electronics industry. At SNUG DCE, Synopsys users can interact with exhibitors and see the latest design enablement solutions spanning seven designer communities: Compute and Design Infrastructure, Custom Design and AMS Verification, FPGA, IC Design, IC Verification, IP, and Prototyping & System Design. DCE is open to all registered attendees of SNUG Boston.

Thursday, Sept. 11, 2014, 4:45-7 p.m.
Boston Newton Marriott, Salon D-H
2345 Commonwealth Avenue
Newton, MA 02466

About Real Intent

Companies worldwide rely on Real Intent’s EDA software to accelerate early functional verification and sign-off of electronic designs. The company provides comprehensive CDC verification, advanced RTL analysis and sign-off solutions to eliminate complex failure modes of SoCs. Real Intent’s Meridian and Ascent product families lead the market in performance, capacity, accuracy and completeness. Please visit for more information.

Real Intent and the Real Intent logo are registered trademarks, and Meridian and Ascent are trademarks of Real Intent, Inc. All other trademarks and trade names are the property of their respective owners.

AMS       Analog/Mixed-Signal
CDC       Clock Domain Crossing
FPGA      Field Programmable Gate Array
IC           Integrated Circuit
IP            Intellectual Property
QoR       Quality of Results
RTL        Register Transfer Level
SDC        Synopsys Design Constraints
SOC        System on Chip
VHDL     Very High-Level Design Language

Press contact:
Sarah Miller for Real Intent
ThinkBold Corporate Communications
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Manager, Field Applications Engineering for Real Intent at Sunnyvale, CA
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