San Francisco, August 28, 2014: Abelite Design Automation today announced the release of its comprehensive Statistical Monte Carlo based Advanced Timing Signoff Analysis tools. This release comes after several years of intense development headed by Dr. Alexander Tetelbaum and his team of engineers and scientists.
Abelite Design Automation provides breakthrough tools and consulting for advanced timing signoff of complex digital electronic systems utilizing 28-to-10nm deep-submicron technologies.
Abelite’a advanced tools are complimentary to current commercial STA/SSTA methodologies and are designed to improve key design metrics (performance, timing yield, costs, etc.). As a result, the tools reduce design turn-around and development time significantly compared to current commercial solutions.
“Abelite tools are unique and not available from any other EDA vendors today “, Dr. Tetelbaum noted. “ Our tools obsolete current corner-based signoff methodology and we take into account all variation sources and correlations, not only process factors. We separate variations in cells, wires, and vias and fix only minimum number of violations to deliver user’s demanded timing yield”.
Abelite’s cutting edge timing signoff methodology has led to the creation of new statistical analysis tools which are superior to current commercially available STA/SSTA tools. Its tools prevent timing violations in critical paths that lead to silicon failure & remove timing pessimism in the rest of paths. Abelite’s unique & truly statistical tools offer solutions to contemporary technology & design challenges.
Founded in February of 2012, Abelite Design Automation specializes in the Semiconductor Design Timing Signoff solutions. The company offers wide range of tools and services designed to empower its customers to achieve greater efficiency and accuracy in their design metrics. Its headquarter is in Walnut Creek, just outside San Francisco, CA.