Rocketick Technologies Ltd., a Leading Provider of Verilog Simulation Acceleration Solutions for Chip Verification, Today Announced the Release of RocketSim-CPU

RAMAT GAN, ISRAEL. –– May 27, 2014 — Rocketick Technologies Ltd., a leading provider of Verilog simulation acceleration solutions for chip verification, today announced the release of RocketSim-CPU, an important addition to its product line. RocketSim-CPU is a Co-Simulator that runs on a standard multicore CPU server while dramatically accelerating a wide range of Verilog simulations. From an IT perspective, deployment of RocketSim-CPU is seamless as it does not require installation of any hardware. 

“RocketSim-CPU rounds off our package of solutions by enabling us to accelerate a very broad range of simulations including RTL (block level and full chip) and Gate level (functional and DFT) simulations”, says Tomer Ben-David, CEO of Rocketick Technologies Ltd. “RocketSim helps our customers deal with designs that are currently stretching the limits of the common simulation tools, enabling them to simulate new designs in full 4-state accuracy and enhanced visibility, all being done dramatically faster”.

Rocketick will exhibit at the Design Automation Conference in the San Francisco, June 2-4, 2014. Please come visit us at booth #901 to attend live demos of RocketSim-CPU and meet Rocketick’s management and engineering teams.            

About Rocketick
Rocketick, founded in 2008 by a group of hardware-assisted-acceleration experts, is a pioneer in multicore simulation acceleration solutions for chip verification. Its flagship product, RocketSim™, solves functional verification bottlenecks by complementing simulators with a multicore acceleration solution that offers faster simulations for highly complex designs. RocketSim is used today by several semiconductor customers including NVidia and PMC-Sierra and is backed up by Intel Capital and Nvidia

For more information, visit  www.rocketick.com or email us at  Email Contact.

 



Read the complete story ...


Review Article Be the first to review this article

ALDEC:

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Reverie: All That Glitters is not Past
More Editorial  
Jobs
Senior Physical Design Engineer for Ambiq Micro at Austin, TX
Digital and FPGA Hardware Designer for Giga-tronics Incorporated at San Ramon, CA
Development Engineer-WEB SKILLS +++ for EDA Careers at North Valley, CA
SoC Design Engineer for Intel at Santa Clara, CA
Technical Marketing Manager Valley for EDA Careers at San Jose, CA
FAE FIELD APPLICATIONS SAN DIEGO for EDA Careers at San Diego, CA
Upcoming Events
European 3D Summit 2017 at 3, parvis Louis Néel 38054 Grenoble France - Jan 23 - 25, 2017
3D Printing Electronics Conference at High Tech Campus 1, 5656 Eindhoven Eindhoven Netherlands - Jan 24, 2017
DesignCon 2017 at Santa Clara Convention Center Santa Clara CA - Jan 31 - 2, 2017
Embedded Neural Network Summit at San Jose CA - Feb 1, 2017
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy