MEDIA ALERT: ProPlus Design Solutions to Demonstrate New NanoSpice Giga SPICE Simulator, Other FinFET-Ready Design-for-Yield Products at DAC

SAN JOSE, CA -- (Marketwired) -- May 21, 2014 --


WHO: ProPlus Design Solutions, Inc., the leading technology provider of giga-scale parallel SPICE simulation, SPICE modeling solutions and Design-for-Yield (DFY) applications

WHAT: Will demonstrate its new NanoSpice™ Giga, the first giga-scale SPICE simulator to handle more than one-billion element memory circuits with a pure SPICE engine and no need for FastSPICE technologies or options at the 51st Design Automation Conference (DAC) Booth #905. Other demonstration will feature its other FinFET-ready DFY products.

WHEN: Monday, June 2, through Wednesday, June 4, from 9 a.m. until 6 p.m.

WHERE: Moscone Center, San Francisco

Additional demonstrations will highlight NanoSpice™ and NanoYield™ features, including:

  • High-performance, highly accurate simulation for large post-layout analog designs
  • High-performance RF simulation with high-fidelity PNOISE analysis
  • Breakthrough 10,000+ variable 7 sigma yield prediction
  • Massively parallel PVT corner simulation and design optimization

Attendees will learn how to leverage ProPlus' 20+ year industry-leading SPICE modeling expertise to help modeling, quality assurance, process platform evaluation and benchmark efforts.

ProPlus will host a daily drawing in its booth for a new iPad mini. For more information about ProPlus Design Solutions, visit: www.proplussolutions.com. Meetings or demonstrations during DAC can be scheduled via email. Requests should be sent to: dac@proplussolution.com.

ProPlus will sponsor two Pavilion Panels in Booth #313 on the exhibit floor. Dr. Bruce McGaughy, ProPlus' chief technology officer and senior vice president of engineering, will participate in the first, "Giga-Scale Design Challenges: Billions and Billions of Transistors, June 2, at 11:30 a.m. "China Fabless: Threat or Opportunity?" also will be held June 2 at 1:30 p.m. Ice cream provided by ProPlus will be served.

Dr. Lianfeng Yang, ProPlus' vice president of marketing, will present "Modeling Process Variation and Analyzing Its Impact in Circuit Designs" June 3, 11:30 a.m. in the SMIC Booth #413.

The complete program can be found on the DAC website: www.dac.com.

About ProPlus Design Solutions
ProPlus Design Solutions, Inc. delivers Electronic Design Automation (EDA) solutions with the mission to enhance the link between design and manufacturing. It is the global leader for SPICE modeling solutions and the leading technology provider for unique Design-for-Yield (DFY) products that integrate the key DFY components -- advanced device modeling software, a parallel SPICE simulation circuit simulator and hardware-validated statistical variation analysis tools. Products include: BSIMProPlus™/Model Explorer™, a modeling technology platform for nanometer devices; NoisePro™/9812B/9812D, the golden solution for low-frequency 1/f noise and Random Telegraph Signal (RTS) noise characterization and process monitoring; NanoSpice™, a high-capacity, high-performance parallel SPICE simulator for giga-scale circuit simulation; and NanoYield™/NanoExplorer™, a variation analysis platform for yield versus power, performance and area trade-off of memory, analog and digital circuit designs. ProPlus Design Solutions has R&D centers in the San Jose, Calif. and Beijing and Jinan, China, with sales offices in Tokyo, Japan, Hsinchu, Taiwan, and Shanghai, China. More information about ProPlus Design Solutions can be found at www.proplussolutions.com.

BSIMProPlus, Model Explorer, NanoExplorer, NanoSpice, NanoYield and NoisePro are registered trademarks of ProPlus Design Solutions. ProPlus Design Solutions acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

For more information, contact:
Nanette Collins
Public Relations for ProPlus Design Solutions 
(617) 437-1822

Email Contact 





Review Article Be the first to review this article
Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Computer History Museum: the Future of War is Here
More Editorial  
Jobs
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, Germany
REVISED***Director Product Line RF/IC for EDA Careers at San Jose, CA
Senior SW Developer for EDA Careers at San Jose, CA
Upcoming Events
“Empowering Leadership with WIT and WISDOM” at SEMI 673 South Milpitas Blvd. Milpitas CA - Nov 28, 2017
Artificial Intelligence and Convolution Neural Networks Discussion at San Jose State University Student Union Theater San Jose CA - Dec 4, 2017
Silicon Valley's Only Comprehensive Embedded Systems Conference at San Jose Convention Center 150 W. San Carlos St. San Jose CA - Dec 5 - 7, 2017
Oski Technology’s Decoding Formal Club Meeting at The Conference Center San Jose CA - Dec 7, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise