Mellanox Technologies Standardizes on Synopsys' Design Compiler Graphical

Achieves Higher Operating Frequencies and Smaller Area

MOUNTAIN VIEW, Calif., May 1, 2014 — (PRNewswire) —

Highlights:

  • Design Compiler Graphical delivers 10 percent faster timing and tight correlation to IC Compiler
  • Mellanox widely deploys Design Compiler Graphical to achieve challenging design goals within schedule

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced that Mellanox Technologies, a leading supplier of high-performance, end-to-end interconnect solutions for data center servers and storage systems, has standardized on Synopsys' Design Compiler® Graphical RTL Synthesis solution for the design of their interconnect products. High throughput with low latency is a key concern for data centers, requiring interconnect solution ICs to meet challenging performance requirements. To achieve these goals, Mellanox Technologies has widely deployed Design Compiler Graphical, a key component of Synopsys' Galaxy™ Design Platform and is realizing 10 percent higher performance, lower area and a highly convergent design flow.

"High-throughput chips are critical to success in providing end-to-end InfiniBand and Ethernet-based interconnect solutions to our customers," said Tzvika Shmueli, senior director, backend chip design at Mellanox Technologies. "With Design Compiler Graphical, we are experiencing 10 percent faster timing and very tight correlation to IC Compiler, which enables us to identify and fix design issues early in the flow. Design Compiler Graphical has also helped us reduce area and is now a standard component of our design flow."

Design Compiler Graphical addresses challenging design requirements at both established and emerging process nodes. It includes shared technology with the Synopsys IC CompilerTM solution that takes physical effects, such as routing congestion and RC variation into consideration and delivers superior timing, area, routability and power results. The physical guidance passed to IC Compiler, brings synthesis timing and area estimations to within five percent of layout, resulting in fewer iterations and faster design closure.

"Market leaders, such as Mellanox, who are targeting high-performance data center solutions rely on Design Compiler Graphical to achieve aggressive timing objectives within tight schedules," said Bijan Kiani, vice president of marketing for Synopsys' Design Group. "The product's innovative synthesis technologies and tight links with the Galaxy Design Platform enable our customers to accelerate delivery of industry-leading products to their target markets."

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, Synopsys delivers software, IP and services to help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at www.synopsys.com.

Editorial Contacts:
Sheryl Gulizia
Synopsys, Inc.
650-584-8635
Email Contact

Lisa Gillette-Martin
MCA, Inc.
650-968-8900 ext. 115
Email Contact

SOURCE Synopsys, Inc.

Contact:
Synopsys, Inc.
Web: http://www.synopsys.com




Review Article Be the first to review this article

ALDEC:

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Reverie: All That Glitters is not Past
More Editorial  
Jobs
Senior Physical Design Engineer for Ambiq Micro at Austin, TX
SoC Design Engineer for Intel at Santa Clara, CA
Digital and FPGA Hardware Designer for Giga-tronics Incorporated at San Ramon, CA
Technical Marketing Manager Valley for EDA Careers at San Jose, CA
Development Engineer-WEB SKILLS +++ for EDA Careers at North Valley, CA
FAE FIELD APPLICATIONS SAN DIEGO for EDA Careers at San Diego, CA
Upcoming Events
European 3D Summit 2017 at 3, parvis Louis Néel 38054 Grenoble France - Jan 23 - 25, 2017
3D Printing Electronics Conference at High Tech Campus 1, 5656 Eindhoven Eindhoven Netherlands - Jan 24, 2017
DesignCon 2017 at Santa Clara Convention Center Santa Clara CA - Jan 31 - 2, 2017
Embedded Neural Network Summit at San Jose CA - Feb 1, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy