System marginality validation explained in new eBook by ASSET InterTech -- Operating margins better predict real-world performance, reducing returns

May 01, 2014 -- Taking into account the operating margins on a circuit board design has emerged as a better predictor of the design’s performance over its life cycle than plotting signal integrity on a few buses with an oscilloscope. A new eBook published by ASSET® InterTech ( www.asset-intertech.com) explains how system marginality validation (SMV) is performed and its many advantages over legacy design validation methods.

“Manufacturers want to minimize the warranty returns of their products and SMV is, quite simply, the most effective way to ensure that all aspects of a design have enough margin to avoid intermittent crashes or system hangs,” said Adam Ley, chief technologist, non-intrusive board test and JTAG, for ASSET and one of the three authors of the eBook. “SMV shows the engineer whether the design has enough margin to operate optimally despite variances in the assembly processes for the chips and the circuit board itself, as well as changes in voltage, temperature, humidity and other conditions. SMV provides engineers a statistical level of confidence in the design.”

The new eBook is titled “System Marginality Validation of DDR3 | DDR4 Memory and Serial IO”. It is available as a free download from the eResources center on the ASSET web site at: http://www.asset-intertech.com/Products/High-Speed-I/O-Validation/HSIO-Software/System-Marginality-Validation-DDR-Memory-and-Serial-IO

Other informative eBooks, white papers and videos on issues relating to chip, board and system debug, validation and test can be downloaded from the ASSET website at: http://www.asset-intertech.com/eResources

About ASSET InterTech

ASSET InterTech is a leading supplier to the electronics industry of tools based on embedded instrumentation. Its SourcePoint debugger and the ScanWorks platform for embedded instruments overcome the limitations of external test and measurement equipment by applying instrumentation embedded in code and in semiconductors to debug software and firmware, and to perform design validation and manufacturing test on chips and circuit boards. ASSET’s recent acquisition of Arium ( www.arium.com) added a powerful suite of software debug and trace tools to the ScanWorks platform. Designers can quickly debug firmware and then diagnose how it interacts with hardware. ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.

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