Aldec Celebrating 30 years: Advanced Verification, HW/SW Emulation, Reception @ DAC 2014

 
Technical Sessions and Demonstrations 
June 2-4, 2014 from 9:00am-6:00pm at Booth #1521 
 
Session 01: Quick Intro to SCE-MI
Session 02: OSVVM: Advanced Verification for VHDL with Synthworks
Session 03: SoC Emulation Made Easy
Session 04: Visual Mapping: GPS for UVM Journey
Session 05: High Level Synthesis with NEC
Session 06: Requirements-Based Verification
Session 07: Design Rule Checks in FPGA design
Session 08: Prototyping over 100M Gates
Session 09: Ask Aldec: Demos, Roadmaps, Partners, Q&A, etc.
 
1-on-1 Sessions fill up quickly. Visit http://www.aldec.com/dac2014 to register. Choose one or more sessions and schedule a time that is convenient for you. 
 
Aldec, Inc.
Ph: +1 (702) 990-4400
Email Contact
 

  
Aldec, Inc., headquartered in Henderson, Nevada, is a global industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions.

 

Design Automation Conference (DAC) 2014
Conference: June 1-5, 2014
Exhibit: June 2-4, 2014

Moscone Convention Center
Booth #1521  San Francisco, CA

DAC Monday Night
Networking Reception

Monday, June 2, 2014
6:00pm - 7:00pm

Moscone Center Esplanade Foyer

Aldec is proud to sponsor DAC’s annual Monday Night Networking Reception.

All registered DAC Attendees and Exhibitors are invited to join us as we celebrate Aldec’s 30 Year Anniversary with free cocktails, hors d'oeuvres, cupcakes and prizes.
 
 



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