ClioSoft Webinar: Making Design Reuse Work

FREMONT, Calif., April 28, 2014 – In order to make design reuse work, a number of factors must be considered. ClioSoft Inc., a leader in hardware configuration management (HCM) solutions for the semiconductor design industry, will be conducting a webinar to outline considerations for designers on Wednesday, April 30th at 11:00am Pacific.

WHAT:  As more companies emphasize the need to reuse designs as much as possible, design teams will need to know:

  • How to select the desired IP and integrate it into the design while simultaneously managing updates to the IP.
  • How to increase the participation of designers in the process of creating reusable IP.
  • How to provide the most efficient forum through which designers can collaborate.
  • How to move away from the traditional IP model and identify all the things in the design flow that can be considered as IP.

The webinar will focus on these and other factors that can make design reuse more productive.

WHO IS PRESENTING:  Daniel Nenni, Semiwiki.

Daniel Nenni has worked in Silicon Valley for the past 30 years with computer manufacturers, EDA software and semiconductor IP companies. Currently, Daniel is a Strategic Foundry Relationship Expert for companies wishing to partner with TSMC, UMC, SMIC, GLOBALFOUNDRIES, Samsung, and their top customers. Daniel's latest passion is the Semiconductor Wiki project.

WHO SHOULD ATTEND:  Managers and engineers using IPs in their SoC designs

WHEN:  Wednesday, April 30th, 2014 at 11:00am Pacific. Duration 30 minutes

WHERE: Online webinar. Register at http://www.cliosoft.com/seminar/ip/ The seminar will be conducted via WebEx meeting service. A web URL to join the meeting will be emailed a day before the seminar. The WebEx meeting application will automatically be downloaded when you click on the URL on the day of the seminar.

About ClioSoft

ClioSoft is the premier developer of hardware configuration management (HCM) solutions. The company's SOS Design Collaboration platform is built from the ground up to handle the requirements of hardware design flows. The SOS platform provides a sophisticated multi-site development environment that enables global team collaboration, design and IP reuse, and efficient management of design data from concept through tape-out. Custom-engineered adaptors seamlessly integrate SOS with leading design flows – Agilent’s Advanced Design System (ADS), Cadence’s Virtuoso® Custom IC, Mentor’s Pyxis Custom IC Design, Synopsys’ Galaxy Custom Designer and Laker™ Custom Design.

All trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

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Media Contact:

Linda Marchant, Cayenne Communication, 919-451-0776, linda.marchant@cayennecom.com

 

 



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