Abstract: Tanner EDA introduces new HiPer Silicon Design Suite, version 16.1, including advanced new features that improve designer productivity and capability. Look under the hood of v16.1 which includes: OpenAccess import in S-Edit, improved cross-probing, OASIS import and export, HiPer PX integration with HiPer Verify, Command Line DRC and Extract, a new digital Place and Route tool (HiPer P&R), waveform comparison and other additional features. Attend this webinar to learn more about new features in v16.1.
Presenter: Rupinder Mand, Field Applications Engineer
Rupinder Mand joined Tanner EDA in 2011. He provides pre-sales and post-sales technical support regarding IC Design and Tanner EDA tools such as S-Edit, T-Spice, W-Edit, L-Edit, HiPer PX and HiPer Verify. He is also responsible for providing technical training, presentations and demonstrations on Tanner EDA tools.
- Enhancements in HiPer Silicon Design Suite v16.1
- New Digital Place and Route Tool for Mixed-Signal Designs
- HiPer PX Integration with HiPer Verify: extract devices & interconnect parasitics.
Space is limited - so sign up today. A live Q&A session will be conducted at the end of the webinar.