Synopsys Co-CEO Aart de Geus to Speak at Morgan Stanley Technology, Media & Telecom Conference

MOUNTAIN VIEW, Calif., Feb. 26, 2014 — (PRNewswire) — Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced that Aart de Geus, Chairman and co-CEO, will speak at the Morgan Stanley Technology, Media and Telecom Conference on March 5, 2014.

This event will be broadcast live on the Internet via the Synopsys corporate website at http://www.synopsys.com/Company/InvestorRelations on Wednesday, March 5, 2014, at 12:45 p.m. PT (3:45 p.m. ET).  The webcast replay of the presentation will be available at the Synopsys corporate website approximately one hour following the conclusion of the live event, and remain available for 90 days.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, Synopsys delivers software, IP and services to help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at www.synopsys.com.

Investor Contact:
Roberta Reid
Synopsys, Inc.
(650) 584-1901

SOURCE Synopsys, Inc.

Contact:
Synopsys, Inc.
Web: http://www.synopsys.com




Review Article Be the first to review this article

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
H-1B Visa: de Geus’ tragedy looms large
Peggy AycinenaIP Showcase
by Peggy Aycinena
IP for Cars: Lawsuits are like Sandstorms
More Editorial  
Jobs
Lead Java Platform Engineer IOT-WEB for EDA Careers at San Francisco Area, CA
Staff Software Engineer - (170059) for brocade at San Jose, CA
Mechanical Designer/Engineer for Palo Alto Networks at Santa Clara, CA
Technical Support Engineer for EDA Careers at Freemont, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
ASIC/FPGA Design Engineer for Palo Alto Networks at Santa Clara, CA
Upcoming Events
Embedded Systems Conference ESC Boston 2017 at Boston Convention & Exhibition Center Boston MA - May 3 - 4, 2017
2017 GPU Tech Conference at San Jose McEnery Convention Center 150 West San Carlos Street San Jose CA - May 8 - 11, 2017
High Speed Digital Design and PCB Layout at 13727 460 Ct SE North Bend WA - May 9 - 11, 2017
Nanotech 2017 Conference & Expo at Gaylord National Hotel & Convention Center WA - May 14 - 17, 2017
DAC2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy