EDA and IP Standards Highlight Accellera Day, March 3 at 2014 Design and Verification Conference and Exhibition

NAPA, CA -- (Marketwired) -- Feb 13, 2014 -- Accellera Systems Initiative (Accellera), the not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry, will host its annual Accellera Day on Monday, March 3. The day-long event kicks off the 2014 DVCon (Design and Verification Conference and Exhibition) and features in-depth tutorials from experts and users on the latest in electronic design and intellectual property standards.

What/When/Where
Accellera Day is Monday, March 3, 8:30am-4:30pm, and kicks off DVCon 2014, to be held through March 6 at the DoubleTree Hotel in San Jose, Calif. A booth crawl in the Expo will be held from 5:00pm-7:00pm. Find out more.

Agenda
Accellera Day presents in-depth tutorials about the latest in EDA and IP standards. A luncheon features an update on Accellera activities, presentation of the annual Technical Excellence Award for outstanding achievement and contribution to Accellera standards, and industry panel on mixed signal verification.

9:00am to 12:00pm

  • Tutorial 1: UVM - What's Now and What's Next
  • Tutorial 2: Using UPF for Low Power Design and Verification

12:15pm to 1:45pm

  • Accellera Luncheon:
    The Future of Mixed Signal Verification: From Manual Simulations to Full Regression?

2:00pm to 5:00pm

  • Tutorial 3: Case Studies in SystemC
  • Tutorial 4: Experience the Next ~Wave~ of Analog and Digital Signal Processing Using SystemC AMS 2.0 (ends 5:30pm)
  • Tutorial 5: OCP: The Journey Continues

5:00pm to 7:00pm

  • DVCon Expo - BOOTH CRAWL

View full details

Registration
Accellera Day is offered as part of DVCon 2014. Find out more and register.

Sponsors
Accellera Systems Initiative Day is sponsored by ARM, Cadence, Mentor Graphics, and Synopsys.

Multi-language Birds-of-Feather Meeting
Accellera will sponsor a Multi-language Birds-of-Feather meeting on Tuesday, March 4 from 6:00pm to 8:00pm at the DoubleTree Hotel. The Multi-language Working Group (MLWG) is working on a standard to define multi-language verification interoperability including languages or methodologies based on or using SystemVerilog, UVM, and/or SystemC. Engineers, authors, users and EDA tool vendors are invited to participate in the open session. Registration is not required. Find out more.

About DVCon 2014
The 2014 DVCon (Design and Verification Conference and Exhibition) will be held March 3-6 in San Jose, Calif. Sponsored by Accellera, DVCon is the industry's premier conference for functional design and verification. This year's conference is expected to be the best attended yet, with 12 technical sessions, a conference record of 12 tutorials, a poster session with a record number of 30 posters being presented, and record number of exhibitors. Find out more at www.dvcon.org

About Accellera Systems Initiative
Accellera Systems Initiative (Accellera) provides design and verification standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA and IP standards that lower the cost to design commercial IC and EDA products. As a result of Accellera's partnership with the IEEE, Accellera standards are transferred to the IEEE standards body for formalization and ongoing change control. For more information about Accellera, visit www.accellera.org.

Add to Digg Bookmark with del.icio.us Add to Newsvine

Editorial Contact:
Jill Jacobs
Public Relations for Accellera
Phone: +1-408-505-6017

Email Contact 





Review Article Be the first to review this article
CST: Webinar November 9, 2017

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
DVCon Europe 2017: Munich and So much more
More Editorial  
Jobs
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Upcoming Events
25th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2017) at Yas Viceroy Abu Dhabi Yas Marina Circuit, Yas Island Abu Dhabi United Arab Emirates - Oct 23 - 25, 2017
ARM TechCon 2017 at Santa Clara Convention Center Santa Clara CA - Oct 24 - 26, 2017
MIPI DevCon Bangalore 2017 at The Leela Palace Bengaluru India - Oct 27, 2017
MIPI DevCon Hsinchu City 2017 at Sheraton Hsinchu Hotel Taiwan - Oct 31, 2017
CST: Webinar series
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise