Programmable Interrupt Controller D8259 from Digital Core Design

Digital Core Design, IP Core provider and the System on Chip design house from Poland introduced in its offer the D8259. DCD’s Programmable Interrupt Controller is fully compatible with the 82C59A device. As all other cores design by Polish company, the D8259 is technology independent, so it can be implemented both in ASIC and FPGA.

Bytom, 4thof November 2013.The D8259 is a soft Core of Programmable Interrupt Controller, which is fully compatible with the 82C59A device. DCD’s IP core can manage up to 8-vectored priority interrupts for the processor. – But that’s not all, cause you can also program it to cascade and gain up to 64 vectored interrupts  - adds JacekHanke, DCD’s CEO. And if it still seems to be not enough, one can always get more than 64 vectored interrupts, by programming the D8259 to the Poll Command Mode.

The D8259 Package includes fully automated testbench. Thanks to complete set of tests, one can easily validate the whole package at each stage of SoC design flow. Same as all other DCD's IP Cores, this one's got also a technology independent design, that can be implemented in a variety of process technologies.

The D8259 can operate in all 82C59A modes and it supports all 82C59A features:

  • MCS80/85 and 8088/8086 processor modes
  • Fully nested mode and special fully nested mode
  • Special mask mode
  • Buffered mode
  • Pool command mode
  • Cascade mode with master or slave selection
  • Automatic end of interrupt mode
  • Specific and non specific end of interrupt commands
  • Automatic and Specific Rotation
  • Edge and level triggered interrupt input modes
  • Reading of interrupt request register (IIR) and in service register (ISR) through data bus.
  • Writing and reading of interrupt mask register (IMR) through data bus

More information about D8259 IP Core: http://dcd.pl/ipcore/134/d8259/

D8259’s Key Features:

  • 8 vectored priority interrupts
  • Up to sixty-four vectored priority interrupts with cascading
  • Support for all 82C59A modes features
  • MCS-80/85 and 8088/8086 processor modes
  • Fully nested mode and special fully nested mode
  • Special mask mode
  • Buffered mode
  • Pool command mode
  • Cascade mode with master or slave selection
  • Automatic end-of-interrupt mode
  • Specific and non-specific end-of-interrupt commands
  • Automatic and Specific Rotation
  • Edge and level triggered interrupt input modes
  • Reading of interrupt request register (IIR) and in-service register (ISR) through data bus
  • Fully synthesizable HDL Source Code
  • Static design and no internal tri-states

Information about Digital Core Design:

Digital Core Design is a leading Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house. The company was founded in 1999 and since the early beginning has been considered an expert in IP Core architecture improvements. Thousands of customers became convinced by our unique solutions and billions of people worldwide use our technology in USBs, MP3 players, mobile phones and many other applications.

The innovativeness of DCD's IP solutions has been confirmed by over 500 licenses sold to over 300 customers worldwide, such as: INTEL, SIEMENS, PHILIPS, TOYOTA, OSRAM, GENERAL ELECTRIC, SILICON GRAPHICS, RAFAEL, SAGEM or GOODRICH.

More information: http://dcd.pl/page/147/about/ 


Contact: 

Tomeq Cwienk 
Digital Core Design 
ul. Wroclawska 94 
41-902 Bytom
Poland
tel: + 48 32 282 82 66, ext.25
skype: tomasz.cwienk
mail to: Email Contact




Review Article Be the first to review this article

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
H-1B Visa: de Geus’ tragedy looms large
Peggy AycinenaIP Showcase
by Peggy Aycinena
IP for Cars: Lawsuits are like Sandstorms
More Editorial  
Jobs
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Mechanical Designer/Engineer for Palo Alto Networks at Santa Clara, CA
ASIC/FPGA Design Engineer for Palo Alto Networks at Santa Clara, CA
Technical Support Engineer for EDA Careers at Freemont, CA
Lead Java Platform Engineer IOT-WEB for EDA Careers at San Francisco Area, CA
CAD/CAM Regional Account Manager (Pacific Northwest) for Vero Software Inc. at Seattle, WA
Upcoming Events
Embedded Systems Conference ESC Boston 2017 at Boston Convention & Exhibition Center Boston MA - May 3 - 4, 2017
2017 GPU Tech Conference at San Jose McEnery Convention Center 150 West San Carlos Street San Jose CA - May 8 - 11, 2017
High Speed Digital Design and PCB Layout at 13727 460 Ct SE North Bend WA - May 9 - 11, 2017
Nanotech 2017 Conference & Expo at Gaylord National Hotel & Convention Center WA - May 14 - 17, 2017
DAC2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy