- Formally verify that on-chip, secure data communications and storage locations are protected from illegal access and unauthorized modifications.
- Capture security requirements and automatically generate the corresponding assertions and constraints. A powerful specification mechanism enables the capture and verification of requirements that are not expressible in standard SystemVerilog Assertions (SVA).
- Model cases of tampering and insertion of faults, to verify that the security system is robust enough to resist attacks or malfunction.
- Use Jasper's unique path sensitization technology to validate the design of the security mechanism in the SOC.
Jasper Design Automation, the leading provider of verification solutions based on state-of-the-art formal technology, has announced the availability of its new JasperGold® Security Path Verification (SPV) App, the industry's first formal verification solution to detect threatening security vulnerabilities in system-on-chip (SoC) designs. Using the new SPV App, SoC designers can specify, analyze and verify design constructs that implement data security as well as identify scenarios that can adversely affect the secure mechanism. The App has been used successfully by a number of Jasper's SoC design customers, confirming the effectiveness of the solution.
"Recently, we have seen a soaring demand among our existing and new customers for verification of on-chip data security," said Claudionor Coelho, Sr. VP of Engineering, Jasper Design Automation. "Many SoC designs store and process sensitive information, such as encryption keys, that must be kept secure. SoC design teams use a comprehensive design and verification methodology to prevent unauthorized access to their secure data. Verifying whether secure information can leak or be modified is difficult using conventional RTL analysis and verification methods based on simulation and traditional formal technology. The SPV App goes beyond the conventional use of such methods because it allows for comprehensive capture of the security requirements, automatic generation of properties, analysis of potential breaches and fault-aware verification."
SPV Uncovers Data Security Vulnerabilities
Leveraging the comprehensive core formal engines and usability features of the JasperGold platform, the SPV App allows users to specify the legal security access paths. In addition, the new APP enables users to identify potential security vulnerabilities in a SoC design by specifying functional paths between non-secure and secure areas.
Using the RTL data and the path specifications, the App automatically creates properties and constraints and performs an exhaustive verification based on Jasper's unique path sensitization technology. The new SPV App proves that secure data cannot be illegally read or overwritten, and that it remains secure in the presence of hardware faults that could otherwise compromise the security mechanism and open the door to intentional tempering. Designers can also model cases of deliberate tampering by hackers to verify whether the design is sufficiently robust to resist attacks.
The JasperGold SPV App overcomes the shortcomings of traditional simulation-based ad hoc approaches, which can detect paths, but cannot verify their absence. The JasperGold SPV App constitutes a major advance not only over these traditional simulation-based approaches, but also over traditional formal methods by leveraging unique path sensitization technology targeted for such problems.
The new Security Path Verification App is available now. For pricing and sales inquiries, please contact firstname.lastname@example.org.
JasperGold® Security Path Verification App (JG-SV App)
The Security Path Verification (SPV) App enables users to identify potential security vulnerabilities in a design by specifying functional paths between non-secure and secure areas, and then verifying them formally. The SPV App is built on the JasperGold platform, leveraging its rich modeling, optimization, proof engines, and debugging features. The SPV App has been proven by customers to meet the demanding security verification requirements of leading-edge SoC designs.
About JasperGold Apps
JasperGold Apps are built on a single platform that combines multiple formal-based solutions and leverages a common shared database and user interface. Each App is uniquely equipped with specific technology such as automatic assertion generation, visualization, debug, and proof technology to perform a unique verification function. At the same time, the Apps architecture enables sharing of design and verification data for each design under test (DUT) between Apps for increased consistency and productivity. The Apps architecture supports deployment of multiple Apps simultaneously as well as multiple invocations of the same App for improved throughput and performance.
The Apps architecture is extensible such that customers can take advantage of future Apps that will address emerging design and verification needs. The design and verification challenges that customers have addressed by creating flows using our formal technology have been the inspiration for several Apps. Customers will be able to continue to leverage the powerful and highly programmable platform in JasperGold to develop their customized flows.
About Jasper Design Automation
Jasper Design Automation delivers industry-leading software solutions for semiconductor design, verification, and Intellectual Property (IP) reuse, based on state-of-the-art formal technology. Customers include worldwide leaders in the wireless, consumer, computing, and networking electronics industries. Jasper technology has been an essential part of 150 plus successful chip deployments. Headquartered in Mountain View, California, the company is privately held, with offices and distributors in North America, South America, Europe, Israel, and Asia. Visit www.jasper-da.com to reduce risks, increase design, verification and reuse productivity and accelerate time to market.
Jasper Design Automation, the Jasper Design Automation logo, and JasperGold are trademarks or registered trademarks of Jasper Design Automation, Inc. All other trademarks mentioned are the property of their respective companies.
Contacts: Rob van Blommestein 650-966-0234 p Email Contact