Tabula Adds SystemVerilog Support to Stylus Compiler With Verific Design Automation Parser

ALAMEDA, CA -- (Marketwired) -- Aug 13, 2013 -- Verific Design Automation ( www.verific.com), provider of SystemVerilog, Verilog and VHDL parsers, today announced that Tabula ( www.tabula.com) has added Verific's SystemVerilog parser as front-end support to version 2.7.1 of its Stylus® compiler.

Tabula, advancing high-performance programmable logic solutions for network infrastructure systems, announced that its recently released version of the Stylus compiler can process code written with SystemVerilog syntax through the use of the SystemVerilog parser.

"Verific's SystemVerilog and VHDL parsers are among the best architected and implemented software packages in EDA," says Karen Pieper, Tabula's director of software, who has extensive experience parsing Verilog and VHDL. "Our upgrade from Verilog to SystemVerilog went extremely smoothly."

Rob Dekker, Verific's founder and chief technology officer, expressed his congratulations to Tabula on adding SystemVerilog support to the Stylus compiler and remarks, "Over the years, we have developed a close working relationship with Tabula that we value."

"Through our successful and longstanding partnership with Verific, we were able to offer SystemVerilog functionality and support to our customers quickly," adds Steffan Rochel, vice president of software development at Tabula. "Verific's R&D team operates as a seamless extension of our own team and through our combined level of expertise, we will continue to deliver breakthrough products to our customers."

Verific's software serves as the front end to a wide range of EDA and field programmable gate array (FPGA) tools for analysis, simulation, verification, synthesis, emulation and test of register transfer level (RTL) designs. Verific's Parser Platform includes support for SystemVerilog, Verilog, VHDL and UPF, and provides C++ and Perl application programming interfaces (APIs). Verific's software is distributed as C++ source code and compiles on all 32- and 64-bit Unix, Linux and Windows operating systems.

About Verific Design Automation
Verific Design Automation, with offices in Alameda, Calif., and Kolkata, India, provides parsers and elaborators for SystemVerilog, Verilog and VHDL. Verific's software is used worldwide by the EDA and semiconductor community in synthesis, simulation, formal verification, emulation, debugging, virtual prototyping, and design-for-test applications, which combined have shipped more than 40,000 copies. Corporate headquarters is located at: 1516 Oak Street, Suite 115, Alameda, Calif. 94501. Telephone: (510) 522-1555. Facsimile number: (510) 522-1553. Email: Email Contact. Website: www.verific.com. Follow Verific on Facebook: http://www.facebook.com/pages/Verific-Design-Automation/100448363329771.

Verific Design Automation acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

For more information, contact:
Nanette Collins
Public Relations for Verific
(617) 437-1822

Email Contact 





Review Article Be the first to review this article
Featured Video
Editorial
More Editorial  
Jobs
Design Verification Engineer for intersil at Morrisville, NC
Senior Formal FAE Location OPEN for EDA Careers at San Jose or Anywhere, CA
Principle Electronic Design Engr for Cypress Semiconductor at San Jose, CA
Applications Engineer for intersil at Palm Bay, FL
ASIC Hardware Engineer for BAE Systems Intelligence & Security at Arlington, VA
Upcoming Events
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
IPC APEX EXPO 2018 at San Diego Convention Center San Diego CA - Feb 24 - 1, 2018
DVCon US 2018 at Double Tree Hotel San Jose CA - Feb 26 - 1, 2018
5th EAI International Conference on Big data and Cloud Computing Challenges at Vandalur, Kelambakkam high road chennai Tamil Nadu India - Mar 8 - 9, 2018



Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise