Revised standard focusing on low power intent and energy management in chip design made available for download at no charge through the IEEE Get ProgramTM
PISCATAWAY, N.J. — (BUSINESS WIRE) — May 29, 2013 — IEEE, the world's largest professional organization advancing technology for humanity, today announced the publication of IEEE 1801™-2013 “Standard for Design and Verification of Low Power Integrated Circuits.” The standard, which was approved by one of the largest entity-based ballot groups in IEEE Standards Association (IEEE-SA) history, is intended to enhance and improve the energy efficiency of devices by focusing on low power intent (a specification of the planned power-management architecture for a given design) and energy management in chip design.
IEEE 1801-2013 is available immediately at no charge via the IEEE Get ProgramTM, which grants the public access to view and download certain current individual standards. To view and download IEEE 1801-2013, please visit the IEEE 1801-2013 Get Program Web page.
“It has been great to see so many companies participate in the development of this important revision to the standard, and I would like to thank the dedicated team of individuals without whose tireless hard work this would not have been possible,” said John Biggs, chair of the IEEE UPF: Standard for Design and Verification of Low Power Integrated Circuits Working Group. “Standards underpin our industry, and now that power is a primary design constraint, having a recognized standard for power intent is vital for continued growth.”
IEEE 1801 Unified Power Format (UPF) is designed to express power intent for electronic systems and components. IEEE 1801-2013, the revised version of the standard, is intended to provide users with more power, precision and flexibility in defining chip-level specifications.
“We’re getting into a world where everything is interconnected, and low power becomes a major factor in how this is going to be implemented. The future of interconnection depends on efficient energy consumption,” said Stan Krolikoski, chair of the IEEE Computer Society's Design Automation Standards Committee (DASC), which sponsored the standard revision project. “The IEEE 1801-2013 standard not only benefits the end user, but it also has an environmental aspect. It focuses on energy as consumed by the electronics, which is the power characterization of the electronic circuits.”
From power-hungry servers in data centers to the countless devices that contribute to the Internet of Things (IoT), electronic systems use vast amounts of energy every day. Management and control of energy usage through power gating and other related techniques has become mandatory in many electronic systems, both to minimize heat generation and to maximize battery life. Power management involves partitioning a design into independent power domains to enable different power modes that optimize power consumption for each functional mode of the design. The IEEE 1801-2013 standard offers a portable, vendor-independent format for defining the power-management architecture of a system for use in both verification and implementation aspects of the design flow.
“Power-aware design and verification methodology has been advancing rapidly in recent years, and UPF has evolved in parallel to reflect new concepts, methods and approaches,” said Erich Marschner, vice chair of the IEEE UPF working group. “IEEE 1801-2013 UPF is the latest step in this evolution, adding significant new capability, flexibility and precision for power-intent specifications. In the next few years, the IEEE UPF working group will continue to enhance UPF to address new requirements involved in moving up to even higher levels of abstraction, power modeling and power analysis.”
IEEE 1801 is a market-driven standard developed in the spirit of the “OpenStand” paradigm for global, open standards ( http://open-stand.org).
Along with the Association for Computing Machinery (ACM) and the Electronic Design Automation Consortium (EDA Consortium), IEEE is sponsoring the Design Automation Conference (DAC) 2-6 June 2013 at the Austin (Texas) Convention Center. The event is recognized as the premier event for the design of electronic circuits and systems, EDA and embedded systems and software (ESS). From 1 p.m. to 5 p.m. on June 2, DAC attendees will have the opportunity to attend the "Low-Power Design with the New IEEE 1801-2013 Standard" workshop, which covers an introduction to the low power design intent concepts and methodologies fundamental to IEEE 1801. For more information on the DAC, please visit http://www.dac.com.
For more information about the IEEE UPF working group, please visit http://standards.ieee.org/develop/wg/UPF.html.
For more information about IEEE DASC, please visit http://www.dasc.org.
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