MoSys Announces Macnica Americas Support of GigaChip Interface for High-Performance Chip-to-Chip Communications

High-Speed Serial Communications Protocol Enables 100G and Beyond Systems by Connecting Bandwidth Engine ICs with Complex FPGAs

SANTA CLARA, Calif. — (BUSINESS WIRE) — April 23, 2013MoSys (NASDAQ: MOSY), a leader in semiconductor solutions that enable fast, intelligent data access for network and communications systems, today announced that Macnica Americas, a leader in semiconductor distribution and design services with expertise in design services, applications support, chip-to-chip communications protocols, and logistics, will support the GigaChip™ Interface in its distribution and technology innovation business.

The GigaChip Interface (GCI) is a scalable, high-performance, serial protocol for chip-to-chip communications that is differentiated in efficiency and reliability, resulting in system level benefits of reduced power, cost and complexity. Current implementations built with compatible CEI-11G or XFI SerDes electrical transport standards deliver up to 144 Gigabits per second (Gbps) of full duplex data throughput using 16 SerDes lanes when running at a 10G rate. A key differentiator for the GCI protocol is high transport efficiency, even for small payloads. Alternative serial interfaces are typically less than 50 percent efficient when transferring 8 bit and 16 bit data, which means that they deliver less than half the performance at a given bandwidth. The combination of 90 percent transport efficiency, from small to large payloads, with power efficient short reach physical interconnect makes GCI ideal for co-processor, memory, or multi-chip communication. The interface also includes CRC error detection and automatic error recovery provisions to meet the high reliability requirements of enterprise, service provider, and mission-critical communications and compute applications. GCI is an open, royalty-free interface specification designed for use with MoSys’ Bandwidth Engine® family of ICs and is suitable for any chip-to-chip interconnect.

“As a provider of turnkey FPGA design services, we have substantial expertise in high-speed communications protocols and networking, and have seen firsthand the pain points caused by the limitations of more traditional interface protocols,” said Marc Levy, Chief Technical Officer for Macnica Americas. “We believe that leveraging the GigaChip Interface for chip-to-chip communications in high-speed, high-density complex FPGA designs provides the performance, efficiency and reliability necessary to enable 100G systems and beyond.”

“Macnica Americas is one of North America’s leading providers of high-performance semiconductor design and distribution services. We are delighted to have Macnica’s support of the GigaChip Interface in its FPGA design services and technology innovation business,” said John Monson, Vice President of Marketing for MoSys. “Through our collaboration and combined expertise in high-speed communications protocols and networking, MoSys and Macnica are poised to provide powerful solutions that connect MoSys’ Bandwidth Engine® ICs with leading FPGAs through the GigaChip Interface, while delivering on fast time-to-market requirements.”

About Macnica Americas

Macnica Americas Inc. is a subsidiary of the $2.4B Macnica group headquartered in Yokohama, Japan. We offer franchised distribution in North America with a design service center located in San Diego, California. Our IP portfolio include solutions for high speed networking, broadcast video, DSP and embedded applications. Find out more about Macnica America’s suppliers and design services at

About MoSys, Inc.

MoSys, Inc. (NASDAQ: MOSY) is an IP-rich fabless semiconductor company that provides high performance solutions for fast, intelligent data access in network and communications systems. Engineered and built for high-reliability carrier and enterprise applications, MoSys' products are breaking bandwidth barriers™ in data processing to allow for faster packet access and analysis, expanded user capacity and new capabilities required by the expanding global infrastructure. MoSys' Bandwidth Engine® family of ICs combines the company's patented 1T-SRAM® high-density, embedded memory and high-speed, 10 Gigabits per second serial interface with its intelligent access technology and a highly efficient GigaChip™ Interface transport protocol to eliminate bottlenecks in high-speed data access. MoSys is headquartered in Santa Clara, California, and more information is available at

MoSys, 1T-SRAM and Bandwidth Engine are registered trademarks of MoSys, Inc. in the US and/or other countries. Breaking Bandwidth Barriers, GigaChip and the MoSys logo are trademarks of MoSys, Inc. All other marks mentioned herein are the property of their respective owners.


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