April 18, 2013, Monterrey, CA
Docea Power, the design-for-low-power company that delivers software solutions for power and thermal analysis at the architectural level, announces that it will participate to the Electronic Design Process Symposium (EDPS) 2013 in Monterey, CA on April 18, 2013.
Gene Matter, Senior Application Manager, Docea Power, San Jose, CA
Gene will participate to a panel titled: How to make ESL really work?
Power and thermal simulation are critical for many new designs. Handheld devices are optimized for the best user experience and extended battery life . Embedded, data and telecommunications require reliability and RAS. Both types of designs are also thermally limited and require the ability to model both the system and software behavior with coupled power and thermal models. An ESL approach allows the dynamic capability to simulate real workloads, while supporting power models and thermal models that track the implementation. Architectural exploration early in the design can help achieve both power savings and optimize performance while taking into account the thermal behavior. Simulations and”what if” analysis can be quickly performed using this approach.
Session: ESL & Platform
Session co-Chairs: Gary Smith, John Swan.
Thursday, April 18, 2013, 10:15 AM
Monterrey Beach Hotel, Monterrey, CA
Details about the Symposium and the session:
For more details on EDPS and on the panel: http://www.eda-stds.org/edps/
About Docea Power
Docea Power develops and commercializes a new generation of methodology and tools for enabling faster and more reliable power and thermal modelling at the electronic systems level. Its Aceplorer platform offers a consistent approach for executing architectural exploration and optimizing power and thermal behavior of electronic systems at an early stage of a project. Docea’s customers include manufacturers of electronic systems, chips and boards targeting wireless, multimedia, consumer, networking and automotive applications. For more information: www.doceapower.com.