Soft IP Tagging 1.0 Standard is Now Available from Accellera

NAPA, Calif., April 16, 2013 – Accellera Systems Initiative (Accellera), the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards announces completion of its IP Tagging 1.0 standard.  The standard provides a mechanism to track critical soft IP data throughout the entire chip design and development process such that it can be readily identified, tagged, and used again for future designs.   Find out more and download the standard under open source license at

Using the Soft IP Tagging 1.0 standard, engineers now have the ability to easily determine if a block of IP is contained within a chip, if it is the correct version, and if it is a candidate for reuse.  In addition, semiconductor foundries, providers of IP, and manufacturers of design tools now have a standard way to track IP usage and royalty information with their customers.

The chip design process can include editing, synthesis, timing, placement, wiring, and other steps. Normally, control of a third-party IP source is lost once the block of IP is licensed, unlocked, or otherwise made available in clear code. IP Tagging 1.0 facilitates a data-driven method to tag a block of IP and track “where used” for applications such as ownership, royalty calculations, and recognition. It also facilitates the implementation of version identification for applicable bug fixes and errata and allows tracking of other data.

"I would like to thank the members of the IP Tagging Working Group for their dedicated efforts in achieving this IP standard,” said Kathy Werner, Accellera's IP Tagging working group chair. “Soft IP Tagging 1.0 not only provides a mechanism for version control and bug tracking, but can be used to determine the compatibility of an IP block for reuse in a future design. Engineers can now feel confident there is a standard methodology built around IP reuse, tracking, and data control.”

The Soft IP Tagging 1.0 standard is available immediately for download under open source license at 

About Accellera Systems Initiative

Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development, and as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit For membership information, please email  

# # #

Accellera, Accellera Systems Initiative, and IP Tagging are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.

Editorial Contacts:

Jill Jacobs            
Public Relations for Accellera Systems Initiative
Email Contact





Review Article Be the first to review this article
CST Webinar Series


Featured Video
Manager, Field Applications Engineering for Real Intent at Sunnyvale, CA
Upcoming Events
SEMICON Europe at Grenoble France - Oct 25 - 27, 2016
ARM TechCon 2016 at Santa Clara Convention Center Santa Clara CA - Oct 25 - 27, 2016
Call For Proposals Now Open! at Santa Clara Convention Center, Santa Clara, CA California CA - Oct 25 - 27, 2016
DeviceWerx - 2016 at Green Valley Ranch Casino & Resort Las Vegas NV - Nov 3 - 4, 2016
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy