Media Alert: AWR Application Note Highlights Unique Features in Analyst EM Simulator for Chip-Module-Board Transitions

EL SEGUNDO, Calif. – Feb. 19, 2013  

What:

A new application note, “Using Analyst™ To Quickly And Accurately Optimize A Chip-Module-Board Transition,” highlights the unique features of AWR’s 3D finite element method (FEM) EM simulator by demonstrating the optimization of the transition from a board-to-chip signal path. The example shows how the ability to access Analyst seamlessly from within the Microwave Office® environment saves time by eliminating not only the need for the design to be drawn and/or redrawn as is often associated with the use of an EM point tool, but also by providing ready access to additional and powerful features of a circuit design tool such as tuning and optimization.

Where:

The application note can be downloaded from the AWR’s website at http://www.awrcorp.com/solutions/technical-papers

When:  
Immediately

###

© 2013 AWR Corporation. All rights reserved. AWR and Microwave Office are registered trademarks and the AWR logo and Analyst are trademarks of AWR Corporation. Other product and company names listed are trademarks or trade names of their respective companies.

Contact:
    Sherry Hess
    AWR Corporation
    Vice President of Marketing
    (310) 726-3000
    Email Contact




Review Article Be the first to review this article
Synopsys: Custom Compiler


Featured Video
Editorial
Peggy AycinenaIP Showcase
by Peggy Aycinena
Grant Pierce: Grand Challenges in IP
More Editorial  
Jobs
LVS PEX DESIGN ENGINEERS SILICON VALLEY for EDA Careers at San Jose, CA
LVS for PDK Design Engineer SILICON VALLEY for EDA Careers at San Jose, CA
Technical Support Engineer for EDA Careers at Freemont, CA
Upcoming Events
Automotive E/E Architecture China Conference at Shanghai China - May 25 - 26, 2017
EMC PCB Design Integration at 13727 460 Ct SE North Bend WA - Jun 6 - 9, 2017
DAC 2017 Conference at Austin TX - Jun 18 - 22, 2017
2017 FLEX Conference at Monterey Conference Center 1 Portola Plaza, Monterey CA - Jun 19 - 22, 2017
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
DAC2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy