Irida Labs and Tensilica Partner for Computer Vision Applications on Tensilica's New IVP Imaging/Video DSP

SANTA CLARA, Calif.  USA and PATRAS, Greece – February 12, 2013 –  Tensilica, Inc. and Irida Labs today announced that they are partnering to enable availability of Irida Labs’ computer vision software portfolio on Tensilica’s new IVP imaging/video DSP (digital signal processor). Irida Labs has joined Tensilica’s Xtensions partner program and will enhance the support of new joint customers with their extensive computer vision expertise.

“We were very impressed with the embedded vision expertise at Irida Labs, and we welcome them to our partner program,” stated Gary Brown, Tensilica’s director of imaging/video. “We see many opportunities for their applications at companies interested in offloading the imaging functions to our efficient DSP to get 10 to 20x higher peak performance at lower power.”

“We are excited to partner with Tensilica to offer our embedded vision technology and software solutions on a platform as powerful as the IVP,” said Vassilis Tsagaris, CEO of Irida Labs.  “Together, we are able to deliver high-performance power-efficient video analytics and computer vision solutions to the market. We also see great potential for our other software solutions. The IVP platform has proven to be ideal for realizing a cost-effective implementation.”

IVP is an imaging and video dataplane processor (DPU) that is ideal for the complex image, video and gesture recognition signal processing functions in mobile handsets, tablets, digital televisions (DTV), automotive, video games and computer vision. The IVP DSP has a unique instruction set tuned for imaging and video pixel processing that gives it an instruction throughput of over 16x the number of 16-bit pixel operations compared to that of the typical host CPU with single-issue vector instructions.  In addition to its raw instruction throughput advantage to host CPUs, the imaging specific compound instructions supported by IVP give it a higher peak performance of 10 to 20x and much higher energy efficiency.  IVP’s rich instruction set has more than 300 imaging, video and vision-oriented vector operations, each of which applies to 32 or more 16-bit pixels per cycle.

About Irida Labs

IRIDA Labs is a platform-independent leading technology provider of software and silicon intellectual property (IP) for embedded computer vision. Our product portfolio includes embedded vision software and silicon IP for high throughput applications such as video stabilization, face detection and recognition, low-light image enhancement, pedestrian detection and traffic sign recognition addressing consumer electronics, mobile devices and automotive markets. Founded in late 2007, the engineering team is based in Greece, with worldwide sales support. Please come see our demo in Tensilica’s booth 6-D101 at MWC2013 and visit us online at  www.iridalabs.com.

About Tensilica

Tensilica, Inc. is the leader in dataplane processor IP cores, with over 200 licensees. Dataplane processors (DPUs) combine the best capabilities of DSPs and CPUs while delivering 10 to 100x the performance because they can be optimized using Tensilica’s automated design tools to meet specific and demanding signal processing performance targets. Tensilica’s DPUs power SOC designs at system OEMs and seven out of the top 10 semiconductor companies for designs in mobile wireless, telecom and network infrastructure, computing and storage, and home and auto entertainment. Tensilica offers standard cores and hardware/software solutions that can be used as is or easily customized by semiconductor companies and OEMs for added differentiation. For more information on Tensilica’s patented, benchmark-proven DPUs visit  www.tensilica.com.




Review Article Be the first to review this article
Downstream : Solutuions for Post processing PCB Designs

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Blue Pearl: Best kept Secret in EDA
More Editorial  
Jobs
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Analog Hardware Engineer for Teradyne Inc at San Jose, CA
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
FPGA Engineer for Teradyne Inc at San Jose, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Field Application Engineer for Teradyne Inc at San Jose, CA
Upcoming Events
CODES+ISSS 2017, Oct 15-20, 2017, Lotte Hotel, Seoul, South Korea at Lotte Hotel Seoul Korea (North) - Oct 15 - 20, 2017
DVCon 2017 Europe, Oct 16 - 17, 2017, Munich, Germany at Holiday Inn Munich City Centre Munich Germany - Oct 16 - 17, 2017
11th International Symposium on Networks-on-Chip (NOCS 2017) at Seoul Korea (South) - Oct 19 - 20, 2017
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise