Aldec Design and Verification Newsletter: Q1, 2013

Aldec Design and Verification Newsletter: Q1, 2013

2012: Emulation’s Big Year, and a Look Ahead to 2013
2012 was an exceptional year for Aldec globally. The company exceeded revenue expectations across all product offerings, the most significant changes coming from Emulation. Aldec continued to see double digit growth in our traditional market areas of FPGA and ASIC HDL Verification (Active-HDL™, Riviera-PRO™) and Design Analysis and Rule Checking (ALINT™). 2012 also brought several successful and strategic account wins in DO-254, RTAX Prototyping adapters, Hardware-Assisted Verification (HES-DVM™) and the shipment of our first HES-7™ ASIC prototyping platforms based on Xilinx® Virtex®-7 2000T. Read more
       
  Simplify your FPGA Verification: New Tools for Comprehensive Debugging Camouflage for Your HDL Code
'Fast Track to UVM' Interactive Online Training - Coming in February Interoperability of Project Tasks between Riviera-PRO and ALINT
Robustness Testing for DO-254 Designs Aldec Adds HES-7 Prototyping Platform with Support for ARM® Cortex Microprocessor
Controlling Riviera-PRO from MATLAB® Those Pesky SystemVerilog Interfaces...
Become a Linting Expert in 3 Easy Steps!    
 
 

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About Aldec

Headquartered in Henderson, Nevada, Aldec is a global industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, Design Rule Checking, ASIC Prototyping, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com



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