CLK Design Automation, Inc. Joins Liberty TAB

CLK DA joins Standards Board to facilitate broad enablement of timing derates and variance models

Littleton, MA, December 17, 2012 - CLK Design Automation today announced that it has joined the Liberty Technical Advisory Board. Timing derates for process variance, temperature and voltage have become an essential part of 28nm, 20nm and 14nm physical design flows. Today, timing derates depend on a number of different formats including AOCV, OCV and proprietary extensions. CLK’s goal is to help in the standardization of timing derates and variance models based upon the Liberty™ library format, the de facto standard for integrated circuit (IC) and signoff.

“Creating a robust standard for variance models and timing derates will be critical for broad adoption of advanced semiconductor process nodes,” said Isadore Katz, President and CEO of CLK Design Automation, Inc. “It will enable EDA tool vendors, IP suppliers and Semiconductor Foundries to address the challenges of achieving good manufacturing yields with today’s aggressive chip design specifications for power, performance and high levels of system integration.”

“The LTAB welcomes participation from CLK-DA,” said Jim Sproch, LTAB chair.  “CLK-DA brings new ideas and an additional perspective on OCV and we look forward to their involvement in aligning the industry on consistent ways of thinking about and modeling OCV.”

Timing Derates

Timing derates help designers model process variance, temperature, and voltage during the physical design and timing sign-off process. These derates combine manufacturing process information along with other factors, some environmental, some design or library specific, into a set of values that adjust the calculated timing delays to ensure high manufacturing yield.

Today’s leading edge methodologies use AOCV or Advance On Chip Variation. Advanced stage-based on chip variation is a substantial improvement in modeling process variation compared with traditional methods. It can improve design performance and identify complex bugs that might have been masked with traditional timing methods. However, building complete, accurate AOCV tables for full libraries calls for millions of SPICE Monte Carlo runs, which is simply impractical even with unlimited compute resources and software licenses. Moreover, basic methods for generating SBOCV tables are unnecessarily pessimistic. Because they rely on the worst case load and slew they do not reflect the way cells are actually used in a design, and may misdirect the optimization flow.  

AOCV FX from CLK Design Automation: Advance Timing Derates Made Practical

AOCV FX is the first practical, turn-key solution that has the performance and accuracy needed to generate a full database of SBOCV derate factors. Derate tables created by AOCV FX can be used with all of the leading timing and optimization tools.  AOCV FX can help designers correct for unnecessary process pessimism, and incorporate other margin factors for voltage, temperature, and delay accuracy.

About CLK Design Automation

CLK Design Automation is the leader in high accuracy timing variation solutions for nanometer semiconductor designs. CLK DA was founded in 2004, and is backed by Morgenthaler Venture Partners and Atlas Ventures. Path FX and AOCV FX are fast, accurate, and practical solutions for timing closure.

Amber, Path FX, and AOCV FX are trademarks of CLK Design Automation. All other trademarks or registered trademarks are the property of their respective owners.


Ahran Dunsmoor
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978-486-1056 x208

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