ClioSoft Authors Chapter on Data Management in Mixed-Signal Methodology Guide Published by Cadence

Guide provides overview of design, verification and implementation methodologies for AMS IP and SoC design

FREMONT, Calif. — (BUSINESS WIRE) — August 30, 2012 — ClioSoft, Inc., developer of the premier hardware configuration management (HCM) solutions for the electronics design industry, has authored a chapter on data management in the Mixed-Signal Methodology Guide that was published by Cadence Design Systems in August 2012. The Guide provides a broad overview of the design, verification and implementation methodologies required for analog/ mixed-signal (AMS) intellectual property (IP) and system-on-chip (SoC) designs.

The chapter on data management looks at today’s mixed-signal design environment and outlines traditional team design techniques and pitfalls as well as the general requirements for a data management system. It explains how to manage projects with a data management system, how such a system impacts collaboration across globally distributed design centers, and how team design can leverage a data management system for more efficient workflow, to manage engineering change orders, to track releases and variants, and to more effectively reuse IP and process design kits (PDKs) across projects. Examples of rules, roles, access and permissions flesh out methodologies for deployment productivity gains.

“Increased integration and the complexity of modern mixed-signal design require a change in methodology,” said Mladen Nizic, engineering director, mixed-signal solution at Cadence Design Systems. “Analog and digital designers and managers working on mixed-signal designs can benefit from this comprehensive guide in their pursuit of better design flows for improved productivity and cycle time.”

ClioSoft will be holding a weekly drawing to give away copies of the Guide. Register to enter the drawing and to receive a PDF copy of the data management chapter –

The Mixed-signal Methodology Guide can be purchased on Lulu –

About ClioSoft’s Hardware Configuration Management Platform:

ClioSoft’s SOS HCM platform provides management and version control of design data, streamlining the design process by enhancing communication and facilitating efficient and accurate sharing of design data from concept through tape-out. The tight integration of ClioSoft’s design data management suite with major design flows improves hardware design team productivity, reduces the chance of mask re-spins due to configuration errors and makes design reuse more efficient.

About ClioSoft:

ClioSoft is the premier developer of hardware configuration management (HCM) solutions. The company's SOS Design Collaboration platform is built from the ground up to handle the requirements of hardware design flows. The SOS platform provides a sophisticated multi-site development environment that enables global team collaboration, design and IP reuse, and efficient management of design data from concept through tape-out. Custom engineered adaptors seamlessly integrate SOS with leading design flows – Cadence’s Virtuoso® Custom IC, Synopsys’ Galaxy Custom Designer, Mentor’s IC flows, and SpringSoft’s Laker™ Custom Layout Automation System. ClioSoft's innovative Universal DM Adaptor technology "future proofs" data management needs by ensuring that data from any flow can be meaningfully managed. The Visual Design Diff (VDD) engine enables designers to easily identify changes between two versions of a schematic or layout by graphically highlighting the differences directly in the editors. For additional information, please see

All trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.


Cayenne Communication
Linda Marchant, 919-451-0776
Email Contact

Review Article Be the first to review this article
Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Job Openings: Can EDA Predict the Future
More Editorial  
Verification Engineer for Ambarella at Santa Clara, CA
ASIC Design Engineer 2 for Ambarella at Santa Clara, CA
Technical Support Engineer Germany/UK for EDA Careers at San Jose, CA
Senior FPGA Designer for Fidus Electronic Product Development at Fremont, CA
Engr, Elec Des 2 for KLA-Tencor at Milpitas, CA
Timing Design Engineer(Job Number: 17001757) for Global Foundaries at Santa Clara, CA
Upcoming Events
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017
DVCon 2017 China, April 19, 2017, Parkyard Hotel Shanghai, China at Parkyard Hotel Shanghai Shanghai China - Apr 19, 2017
Zuken Innovation World 2017 at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy