Tanner EDA to Participate in Jan. 31 DesignCon Panel: Is It Time for an Analog Comeback?

MONROVIA, California – January 26, 2011 --  At DesignCon 2012, Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), will participate in a panel on analog and mixed-signal design moderated by Brian Bailey at 3:45pm on Tuesday, January 31st.

What:  Panel entitled “ Is It Time for an Analog Comeback?” Abstract:

It seems as if analog was almost a thing of the past. Designs converted analog signals into digital as quickly as they could, leaving only small amounts of analog off-chip. But today that analog circuitry has come on-chip. Radios and high-speed communications are now fully integrated; power-saving schemes are adding new types of analog content; signal integrity and high-speed issues often require analog analysis; and these are demanding better tools and flows to handle the mixed-signal aspects of a design. In addition, there are some parts of a design that operate at speeds greater than digital is capable of. With better tools, will the percentage of the chip consumed by analog increase again? Will the shrinking geometries cause even greater difficulties for analog?

Who:
Moderator: Brian Bailey

Panelists : Jeff Miller, Director of Product Management, Tanner EDA

Warren Savage, CEO, IPextreme

Mladen Nizic, Engineering Director for Mixed-signal Solutions, Cadence

Harold Joseph, Director for PSOC Analog Marketing, Cypress Semiconductor

Navaraj Nandra, Seniro Director of Designware Marketing & Mixed-signal IP, Synopsys

When:  Tuesday, January 31, 2012 from 3:45 until 5:00pm Pacific

Where:  Ballroom F, Santa Clara Convention Center, DesignCon

About Tanner EDA

Tanner EDA provides a complete line of software solutions that catalyze innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

 

HiPer Verify and HiPer Silicon are trademarks of Tanner Research, Inc.

All other trademarks and trade names are the property of their respective owners.




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