SAN JOSE, CA -- (MARKET WIRE) -- Jan 17, 2012 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that it has published a new book to aid verification engineers. "Advanced Verification Topics" describes in great detail the latest techniques and methodologies for verifying today's most complex IP and systems on chips (SoCs). Penned by eight Cadence verification experts, "Advanced Verification Topics" builds on the prior Cadence® book, "A Practical Guide to Adopting the Universal Verification Methodology (UVM)." The new book delves into such topics as metric-driven verification of digital and mixed-signal designs, low-power verification using the UVM, multi-language UVM, and acceleration for the UVM.
"With the march toward greater design complexity showing no sign of abating, comprehensive verification is essential for a company to achieve its profitability goals," said Hao Fang, IP design manager at LSI. "'Advanced Verification Topics' will be an important reference book for teams responsible for verifying complex mixed-signal IP and SoCs that utilize low-power, verification IP (VIP), transaction-level models (TLM), acceleration, and similar techniques to reduce risk while getting end products into working silicon faster."
"Cadence has long been at the forefront in advanced verification, and 'Advanced Verification Topics' is another leap forward for engineers facing the challenge of validating today's remarkably complex designs," said Boyd Donckels, vice president of research and development with the Silicon Realization Group at Cadence. "We are pleased to help verifications engineer working with complex IP and SoCs by sharing the combined knowledge and experience that has come from thousands of successful projects."
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.
For more information, please contact: Dean Solov Cadence Design Systems, Inc. 408-944-7226 Email Contact