Global Unichip Achieves Gigahertz+ Frequency on ARM Cortex-A9 Processor with Synopsys IC Compiler

Standardizes on IC Compiler for High-Performance Processor Implementation

MOUNTAIN VIEW, Calif., Dec. 14, 2011 — (PRNewswire) — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, and Global Unichip Corporation (GUC; TW: 3443), the Flexible ASIC Leader™, today announced that GUC has achieved more than one gigahertz frequency on a dual-core ARM® Cortex™-A9 MPCore™ processor with Synopsys IC Compiler, a key component of Synopsys' Galaxy™ Implementation Platform. Synopsys' high-performance Galaxy implementation methodology was instrumental in achieving more than one gigahertz frequency with minimum power, while reducing schedule risk.

"As the Flexible ASIC Leader, we serve the highly competitive, smart electronics market," said Jim Lai, president, GUC. "For our customers, performance, power and time to market are key differentiators. Partnering with Synopsys to combine their leading-edge tools and technologies with our advanced process and low power design expertise has enabled us to strengthen our service offering and address customer demands."

"We faced several challenges to meet the frequency target for our high-end processor core based designs, which motivated us to adopt IC Compiler," said Albert Li, director, Design Development, Design Service Division, GUC. "Along with Design Compiler® Topographical, IC Compiler's design closure capabilities were critical in closing the frequency gap and helping us tapeout on time. We have standardized this flow for our 40- and 28- nanometer core hardening needs."                                                  

The five-million-gate, dual-core ARM Cortex-A9 processor, intended for high-end digital television chips, was fabricated on a TSMC 40nm low power process. It achieved a signoff frequency of 1 GHz at the worst process corner and 1.3 GHz at the typical process corner, without requiring the use of overdrive voltage. GUC used the Synopsys Galaxy implementation methodology to overcome the design challenges associated with achieving this level of operating frequency and power, including:

  • Sensitivity of high-performance designs to memory macro placement, making it difficult to meet timing between the memories and processors
  • Placement of register banks for improved frequency and routability, often requiring support for structured placement techniques
  • High utilization in excess of 80 percent, requiring timing and congestion to be managed from the outset, starting with synthesis through place and route
  • Tight skew and latency requirements for clock distribution network

 

Highlights of GUC's Galaxy implementation flow include:

  • Design Compiler Topographical to create a better initial netlist for IC Compiler physical implementation
  • IC Compiler's design planning technology for macro placement, along with its physical datapath technology for optimal placement of register banks
  • PrimeTime® for tight correlation between implementation and signoff static timing analysis to deliver high-performance, low power, correlated results

 

"Synopsys IC Compiler has been the widely recognized tool of choice for high-performance processor design," said Antun Domic, senior vice president and general manager, Implementation Group at Synopsys. "We have continued to invest in optimization technology delivering high operating frequency while consuming the lowest power. Our collaboration with GUC and resulting tapeout success at gigahertz-plus speed is strong evidence of our technology delivering winning results."

About GUC

GLOBAL UNICHIP CORP. (GUC) is the Flexible ASIC Leader whose customers target IC devices to leading edge computing, communications and consumer applications.  Based in Hsin-chu, Taiwan GUC has developed a global reputation with a presence in China, Europe, Japan, Korea, and North America.  GUC is publicly traded on the Taiwan Stock Exchange under the symbol 3443.  For more information, go to www.globalunichip.com    

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Synopsys, Design Compiler, PrimeTime and Galaxy are registered trademarks or trademarks of Synopsys, Inc.   GLOBAL UNICHIP CORP., logo, and GUC are registered trademarks of Global Unichip Corporation.   All other brands or product names are the property of their respective holders.  GLOBAL UNICHIP CORP., logo, and GUC are used to represent Global Unichip Corporation and its regional subsidiaries. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

Editorial Contacts:

Synopsys

Sheryl Gulizia

Synopsys, Inc.                             

650-584-8635                              

sgulizia@synopsys.com

 

Lisa Gillette-Martin

MCA, Inc.

650-968-8900 ext. 115

lgmartin@mcapr.com

 

 

GUC

Eva Huang                                     

Global Unichip Corp.             

886-3-564-6600                     

eva.huang@globalunichip.com

 

Chuck Byers

Business Practicum

408-310-9244

charles.byers@b-practicum.com

 

SOURCE Synopsys, Inc.

Contact:
Synopsys, Inc.
Web: http://www.synopsys.com




Review Article Be the first to review this article
CST: Webinar September 14, 2017

Synopsys: Custom Compiler

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Real Intent: Leveraging on Investments
More Editorial  
Jobs
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
FPGA Engineer for Teradyne Inc at San Jose, CA
Field Application Engineer for Teradyne Inc at San Jose, CA
Analog Hardware Engineer for Teradyne Inc at San Jose, CA
Upcoming Events
CODES+ISSS 2017, Oct 15-20, 2017, Lotte Hotel, Seoul, South Korea at Lotte Hotel Seoul Korea (North) - Oct 15 - 20, 2017
DVCon 2017 Europe, Oct 16 - 17, 2017, Munich, Germany at Holiday Inn Munich City Centre Munich Germany - Oct 16 - 17, 2017
11th International Symposium on Networks-on-Chip (NOCS 2017) at Seoul Korea (South) - Oct 19 - 20, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise