"The continued success and growth of our wafer bump, flip chip assembly and advanced wafer level chip scale packaging is a testament to our commitment to manufacturing excellence to drive form factor and performance requirements for our customers at advanced technology nodes and cater to the most demanding needs of mobile and consumer devices," said Wan Choong Hoe, Executive Vice President and Chief Operating Officer, STATS ChipPAC. "We have significantly increased our ability to support customers with 300mm production capacity and can leverage the benefit of higher efficiencies and economy of scale to deliver cost effective packaging solutions."
For WLCSP, all of the manufacturing process steps are performed in parallel at the silicon wafer level rather than sequentially on individual chips. The result is a package that is essentially the same size as the die, achieving one of the most compact semiconductor package footprints with increased functionality, improved thermal performance and finer pitch interconnection to the printed circuit board. STATS ChipPAC Taiwan's advanced wafer level process technologies include low cure temperature polymers and the use of copper for under bump metallization (UBM) and redistribution layers (RDL) to achieve higher densities and increased package reliabilities.
"The addition of fully integrated wafer level processing capabilities in our Hsin-chu Hsien facility increases our ability to provide customers with more cost-effective, high density wafer level packaging solutions for thin, light weight, portable products. We have tripled our Class 100 cleanroom space to 3,478 square meters or 37,437 square feet and significantly increased both our 300mm bump and WLCSP capacity. We have been working to expand our technology processes to support bump pitches down to 40um," said Richard Weng, Managing Director, STATS ChipPAC Taiwan. "Our customers have responded favourably and we are working closely with them to accelerate our production ramp to support the strong growth in demand for full turnkey wafer bump and wafer level packaging services."
Certain statements in this release are forward-looking statements that involve a number of risks and uncertainties that could cause actual events or results to differ materially from those described in this release. Factors that could cause actual results to differ include, but are not limited to, uncertainty surrounding the ongoing impact of the flood in Thailand and its impact to our Thailand facility, shortages in supply of key components and disruption in supply chain; general business and economic conditions and the state of the semiconductor industry; prevailing market conditions; demand for end-use applications products such as communications equipment, consumer and multi-applications and personal computers; decisions by customers to discontinue outsourcing of test and packaging services; level of competition; our reliance on a small group of principal customers; our continued success in technological innovations; pricing pressures, including declines in average selling prices; intellectual property rights disputes and litigation; our ability to control operating expenses; our substantial level of indebtedness and access to credit markets; potential impairment charges; availability of financing; changes in our product mix; our capacity utilisation; delays in acquiring or installing new equipment; limitations imposed by our financing arrangements which may limit our ability to maintain and grow our business; returns from research and development investments; changes in customer order patterns; customer credit risks; disruption of our operations; loss of key management or other personnel; defects or malfunctions in our testing equipment or packages; rescheduling or cancelling of customer orders; adverse tax and other financial consequences if the taxing authorities do not agree with our interpretation of the applicable tax laws; classification of our Company as a passive foreign investment company; our ability to develop and protect our intellectual property; changes in environmental laws and regulations; exchange rate fluctuations; regulatory approvals for further investments in our subsidiaries; majority ownership by Temasek Holdings (Private) Limited ("Temasek") that may result in conflicting interests with Temasek and our affiliates; unsuccessful acquisitions and investments in other companies and businesses; labour union problems in South Korea; uncertainties of conducting business in China and changes in laws, currency policy and political instability in other countries in Asia; natural calamities and disasters, including outbreaks of epidemics and communicable diseases; the continued trading and listing of our ordinary shares on the Singapore Exchange Securities Trading Limited ("SGX-ST"). You should not unduly rely on such statements. We do not intend, and do not assume any obligation, to update any forward-looking statements to reflect subsequent events or circumstances.
About STATS ChipPAC Ltd.
STATS ChipPAC Ltd. is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices in 10 different countries. STATS ChipPAC is listed on the SGX-ST. Further information is available at www.statschippac.com. Information contained in this website does not constitute a part of this release.
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