Taiwan SystemC Users Group Hosts Third Meeting, November 14-15, 2011
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SAN JOSE, CA and HSINCHU, TAIWAN and TAINAN, TAIWAN -- (MARKET WIRE) -- Nov 07, 2011 -- The Open SystemC™ Initiative (OSCI), an independent non-profit organization dedicated to supporting and advancing SystemC as an industry-standard language for electronic system-level (ESL) design, announces the third meeting of the Taiwan SystemC Users Group to be held November 14-15 at the at the Industrial Technology Research Institute (ITRI) in Hsinchu and the National Cheng Kung University (NCKU) in Tainan, respectively. For more information and to register, visit http://tinyurl.com/3g4dto6 (Chinese) and http://www.systemc.org/news/events/ (English).

WHAT:
3rd Taiwan SystemC Users Group Meeting (TSCUG)
Sponsored by OSCI, the Taiwan SystemC Users Group Meeting is an industry event where system integrators, modeling experts, EDA suppliers and system-level design and verification architects and engineers can share and exchange knowledge on the industrial application and benefits of using the SystemC language for system-level modeling, design and verification.

WHEN:
Monday, November 14 and Tuesday, November 15, 09:00 to 16:30.

WHERE:
November 14: ITRI, 195, Sec. 4, Chung Hsing Rd., Chutung, Hsinchu, Taiwan 31040 (R.O.C.)
November 15: National Cheng Kung University, No.1, University Road, Tainan City 701, Taiwan (R.O.C.)

AGENDA:
The agenda features two tracks -- high-level synthesis and system-level modeling -- and includes eight technical presentations by leading universities and top electronics companies who will present the practical usage of the SystemC standard in applications related to semiconductor/IC design, embedded system design and mixed-signal system-level architecture.

Stan Krolikoski, OSCI board member and chair of the IEEE 1666 SystemC Working Group, will kick off each event with a presentation about technical developments of the SystemC standard including an update on transaction-level modeling (TLM).

 

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                                                               TSCUG Chair, 
09:00~ 09:10 Opening                    Dr. Alan P. Su         Synopsys     
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             OSCI and IEEE SystemC                                          
09:10~ 10:00 Standards                  Stan Krolikoski        OSCI         
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             Introduction to SystemC-                                       
10:00~ 10:50 AMS                        Prof. Lih-Yih Chiou    NCKU         
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10:50~ 11:10                           Coffee break                         
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             System Design Exploration                                      
             with ESL Design                                                
11:10~ 12:00 Methodology                Dr. Jen-Chieh Yeh      ICL/ITRI     
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12:00~ 13:20                           Lunch Break                          
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             Track 1:                   Track 2:                            
             High Level Synthesis       System Level Modeling & Verification
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             Optimized High Level       Formal Verification of SystemC      
             Synthesis Solution for     Designs                             
             Multimedia Design and DMA  Prof. Chung-Yang (Ric) Huang, NTU   
             Controller                 (Nov 14)                            
             Steve Wang, Cadence        Why Modeling Accuracy is Important  
13:20~ 14:00                            Winn Cheng, Maojet (Nov 15)         
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             CyberWorkBench: C-based    Mentor ESL Flow                     
             High Level Synthesis and   Stewart Li, Mentor Graphics         
             Verification                                                   
             Dr. Kazutoshi                                                  
14:00~ 14:40 Wakabayashi, NEC                                               
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14:40~ 15:00                                     Coffee  Break                                                  
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                          Case  Study  of  an  ESL              To  be  determined                                        
                          Solution:  High  Level                                                                                      
                          Synthesis  from  Systems  to                                                                            
                          Silicon                                                                                                                
15:00~  15:40  Jeff  Kuo,  Synopsys                                                                                          
----------------------------------------------------------------------------
                          User  Experiences  of  Forte    Why  Modeling  Accuracy  is  Important    
                          Cynthesizer                                Winn  Cheng,  Maojet  (Nov  14)                  
                          Charlie  Uang,  Maojet              ESL  Methodology  in  the  Development    
                                                                                of  3D  Graphics  SoCs                                  
15:40~  16:20                                                        Prof.  Ing-Her  Huang,  NSYSU  (Nov  15)  
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16:20~  16:30                                      Lottery  Drawing  and  Closing                                    
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