AWR Exhibits and Presents “Microwave Circuit Compaction” at IME 2011, Nov. 2-4

El Segundo, CA – October 21, 2011

What: 

AWR Corporation, the innovation leader in high-frequency EDA, will exhibit in booth #E096 at China International Conference & Exhibition on Microwave and Antenna (IME) during the week of November 2-4, 2011.

Additionally, AWR will conduct a workshop titled "Microwave Circuit Compaction – an Effective and Interactive Solution from AWR" on Wednesday, November 2, 2011 beginning at 2:05 PM.   This session will be given by AWR’s regional director of sales for South Asia, Francis Leong and focus upon how AWR’s unique ACE™ (Automated Circuit Extraction) technology enables fast and accurate simulation of coupling effects in microwave circuits.

Within the exhibition, AWR will demonstrate its 2011 software platform, including Microwave Office™ high-frequency microwave/RF circuit design software, AXIEM® 3D planar electromagnetic (EM) analysis software, and Visual System Simulator™ (VSS), radar and communication system simulation software.

Additional demonstrations will also include:

·         AWR Connected™ for CapeSym SYMMIC for electrical-thermal MMIC co-simulation

·         AWR Connected for Antenna Magus for antennas synthesis through to simulation

Where: 
China International Conference & Exhibition on Microwave and Antenna (IME)
Everbright Convention & Exhibition Center

Shanghai, China

When:           

November 2, 3 and 4, 2011 – Exhibition Floor – AWR Booth #E096
November 2, 2011 at 2:05 PM – AWR Workshop on Microwave Circuit Compaction

###




Review Article Be the first to review this article
CST: Webinar September 14, 2017

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Real Intent: Leveraging on Investments
More Editorial  
Jobs
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Analog Hardware Engineer for Teradyne Inc at San Jose, CA
Field Application Engineer for Teradyne Inc at San Jose, CA
FPGA Engineer for Teradyne Inc at San Jose, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Upcoming Events
IEEE Electronic Design Processing Symposium 2017 at 673 S. Milpita Blvd Milpitas CA - Sep 21 - 22, 2017
CODES+ISSS 2017, Oct 15-20, 2017, Lotte Hotel, Seoul, South Korea at Lotte Hotel Seoul Korea (North) - Oct 15 - 20, 2017
DVCon 2017 Europe, Oct 16 - 17, 2017, Munich, Germany at Holiday Inn Munich City Centre Munich Germany - Oct 16 - 17, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise