Calypto Attends ARM TechCon, Offers Class on RTL Verification, Invites Attendees to Learn More About High Level Electronic Design Synthesis, Power Optimization and Equivalence Checking

SANTA CLARA, CA -- (MARKET WIRE) -- Oct 18, 2011 -- ARM TechCon 2011, October 25, Santa Clara, CA

Who/What
Calypto® Design Systems, Inc., the leader in Electronic System Level (ESL) hardware design and Register Transfer Level (RTL) power optimization, announced that Nikhil Sharma, Vice President of Applications Engineering and Services, will speak on Formal Verification of RTL Changes for Intellectual Property (IP) Hardening at ARM TechCon 2011, in Santa Clara, CA, USA, Tuesday, October 25. In addition, during the ARM TechCon Expo on the same day, Calypto representatives will be available to talk about its software platforms, Catapult® HLS (High Level Synthesis), SLEC® (Sequential Logic Equivalence Checking) and PowerPro®, which enable ESL design, dramatically improve design quality and reduce power consumption of System-On-Chip (SOC) devices.

When/Where
Class
Tuesday, October 25, 2011, 4:10pm-5:00pm
Room 207
Formal Verification of RTL Changes for IP Hardening

Exhibit
Tuesday, October 25, 2011, 10:15am-7pm
Stand #5
Santa Clara Convention Center
Santa Clara, CA, USA

For more information
For more information about ARM TechCon, please visit http://e.ubmelectronics.com/armtechcon/index.html.
For more information about Calypto please visit at www.calypto.com.
To make an appointment with Calypto at ARM TechCon, please email Email Contact.

About Calypto
Calypto® Design Systems, Inc. is the leader in ESL hardware design and RTL power optimization. Calypto, whose customers include Fortune 500 companies worldwide, is a member of the ARM Connected Community, Cadence Connections program, the IEEE-SA, Synopsys SystemVerilog Catalyst Program, the Mentor Graphics OpenDoor program, Si2 and is an active participant in the Power Forward Initiative. Calypto has offices in Europe, India, Japan and North America.

More information can be found at www.calypto.com.

Catapult, Calypto, PowerPro and SLEC are trademarks of Calypto Design Systems Inc.
All other trademarks are property of their respective owners.

Add to Digg Bookmark with del.icio.us Add to Newsvine

Press Contact:
Georgia Marszalek
ValleyPR, LLC for Calypto
+1-650.345.7477

Email Contact 





Review Article Be the first to review this article
 True Circuits: Ultra PLL

ClioSoft: Design Hub

Featured Video
Editorial
Peggy AycinenaIP Showcase
by Peggy Aycinena
Grant Pierce: Grand Challenges in IP
More Editorial  
Jobs
LVS PEX DESIGN ENGINEERS SILICON VALLEY for EDA Careers at San Jose, CA
LVS for PDK Design Engineer SILICON VALLEY for EDA Careers at San Jose, CA
Technical Support Engineer for EDA Careers at Freemont, CA
Upcoming Events
EMC PCB Design Integration at 13727 460 Ct SE North Bend WA - Jun 6 - 9, 2017
DAC 2017 Conference at Austin TX - Jun 18 - 22, 2017
2017 FLEX Conference at Monterey Conference Center 1 Portola Plaza, Monterey CA - Jun 19 - 22, 2017
MPSoc Forum 2017 - July 2 - 7, 2017, Les Tresoms Hotel, Annecy, France at Les Tresoms Hotel Annecy France - Jul 2 - 7, 2017
NEC: CyberWorkbench
ClioSoft
DAC2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy