Si2 Announces Distinguished Service Awards

AUSTIN, Texas — (BUSINESS WIRE) — October 17, 2011 — The Silicon Integration Initiative (Si2) announced that it is presenting two Distinguished Service awards at its 16th Si2 Conference to be held on October 20, 2011, at the Network Meeting Center-Techmart, Santa Clara, CA. The first award will be to Qi Wang, Technical Marketing Group Director, Solutions Marketing, Cadence Design Systems, and the second will be presented to David Hathaway, Senior Technical Staff Member, IBM.

The Distinguished Service Award to Qi Wang is based on his many years of successfully guiding the Low Power Coalition Format Working Group through the release of the Common Power Format (CPF) 1.0, CPF 1.1, and CPF 2.0 . In addition to the Si2 standards themselves, Qi also enabled the adoption of the standard through the development and delivery of live tutorials for each release that were recorded and made available to the industry for download and education of individuals and companies. As an example of Qi’s leadership, under his guidance the format working group has developed two Interoperability Guides to explain to the industry how to work with both CPF and 1801-2009. The first Interoperability Guide is in use today and a significant upgrade using CPF 2.0 is about to be released. Qi has also served as vice-chair of the Technical Steering Group of the Low Power Coalition and his council is often sought in any matter related to low power design and the role of formats in the industry

The Distinguished Service Award to David Hathaway is based on his years of Chairmanship of the Low Power Coalition Technical Steering Group and his work with at least two important Working Groups. As part of the Power Design Flows Working Group, David helped develop a Power Closure Reference Flow from System level through implementation. One major outcome of that work was the identification of power models that are required at all levels of the flow. For the last several years, David has also chaired the Power Models Working Group, addressing a large gap in the industry. To date, the Power Modeling Working Group has developed recommendations for mutually exclusive/non-mutually exclusive modeling requirements at the gate level, recommendations for atomic modeling of power states to allow very efficient analysis of large IP blocks. In addition, with David’s leadership, the group has developed a novel power contributor modeling approach at the transistor level with unique features that promises to change the power characterization and simulation methodologies used in the industry.

Registration is still open to the 16th Si2 Conference, see:

About Si2

Si2 is the largest organization of industry-leading semiconductor, systems, EDA and manufacturing companies focused on the development and adoption of standards to improve the way integrated circuits are designed and manufactured, in order to speed time-to market, reduce costs, and meet the challenges of sub-micron design. Now in its 23rd year, Si2 is uniquely positioned to enable timely collaboration through dedicated staff and a strong implementation focus driven by its member companies. Si2 represents nearly 100 companies involved in all parts of the silicon supply chain throughout the world. See


Silicon Integration Initiative
William Bayer, 512-342-2244, ext. 304

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