Aprisa shortens design time and productivity while providing excellent quality results for SoCs
SAN JOSE, Calif. — (BUSINESS WIRE) — September 26, 2011 — ATopTech, the leader in next-generation physical design solutions that address the challenges of designing integrated circuits (ICs), announced today that NetLogic Microsystems, Inc., a worldwide leader in high-performance intelligent semiconductor solutions for next-generation Internet networks, has selected ATopTech’s Aprisa physical design solution for designing complex system-on-chip (SoC) designs at 28nm. Aprisa will be used to design NetLogic Microsystems’ next generation XLP® II multi-core processors.
Designers face many new challenges at lower geometries. ATopTech's physical design tools are architected specifically to meet the design and performance challenges inherent in designing ICs at the most advanced technology nodes, including 28nm design enablement, timing, reliability, low power and design for manufacturing (DFM) capabilities. Aprisa provides fast physical design closure with superior results.
”We chose ATopTech's Aprisa for our 28nm tapeouts because it offers DRC clean routed designs and timing clean databases across multiple corners and modes. Aprisa's router was tailored to handle complex 28nm design rules and its revamped timing engine offers good timing correlation with SI to our sign-off STA tool,” said Nazar Zaidi, vice president of engineering at NetLogic Microsystems. “After successfully using Aprisa on our XLP832 multi-core processor development in the 40nm node, ATopTech was the clear choice for our future 28nm designs.”
NetLogic Microsystems’ best-in-class XLP832 multi-core processor integrates 32 NXCPUs™ featuring quad-issue, quad-threaded and superscalar out-of-order capabilities. It contains an innovative tri-level cache architecture providing a total of 12MBytes of cache, a high-performance memory subsystem with four on-chip 72-bit DDR3 memory controllers with 51.2 Gbps of bandwidth, a low-latency, high-speed fast messaging network and numerous autonomous acceleration engines that offload processing tasks from the processor core including a network acceleration engine, a packet ordering engine, a security engine, a compress/decompression engine and an 8-channel DMA and storage acceleration engine.
“ATopTech solutions deliver shorter design time, improved productivity and quality results to leading-edge SoC designers,” said Eric Thune, vice president of sales and marketing at ATopTech. "We are pleased to continue working with NetLogic Microsystems as they expand into smaller geometries. Their decision to use ATopTech’s solutions for their 28nm designs validates the competitive advantage offered by our tools.”
Aprisa is a complete place-and-route (P&R engine), including placement, clock tree synthesis, optimization, global routing and detailed routing. The core of the technology is its hierarchical database. Built upon the hierarchical database are common “analysis engines”, such as RC extraction, design rule checking (DRC) engine, and an advanced, extremely fast timing engine to solve the complex timing issues associated with OCV, signal integrity (SI) and multi-corner multi-mode (MCMM) analysis. Aprisa uses state-of-the-art multi-threading and distributed processing technology to further speed up the process. Because of this advanced architecture, Aprisa is able to deliver predictability and consistency throughout the flow, and hence faster total turn-around time (TAT) and best quality of results (QoR) for physical design projects.
ATopTech, Inc. is the technology leader in IC physical design. ATopTech’s technology offers the fastest time to design closure focused on advanced technology nodes. The use of state-of-the-art multi-threading and distributed processing technologies speeds up the design process, resulting in unsurpassed project completion times. For more information, see www.atoptech.com.
Aprisa and Apogee are trademarks and ATopTech is a registered trademark of ATopTech, Inc. XLP is a registered trademark of NetLogic Microsystems, Inc. Any other trademarks or trade names mentioned are the property of their respective owners.
Cayenne Communication LLC
Michelle Clancy, 252-940-0981