The FPGA based SoC consisted of NAND Flash Memory Controller, DMA Controller, SDRAM Controller, USB Controller Interface and Host Interface. The Host controller configures various registers to initiate data transfer among SDRAM, NAND Flash memory and USB interface via DMA. As soon as the drive is powered up, data stored in NAND Flash memory (including operating system software) gets transferred to SDRAM. During shut down, data is transferred back to NAND Flash Memory from SDRAM.
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Editorial
Upcoming Events
DAC 2012 at San Francisco CA - Jun 3 - 7, 2012
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