Raghavan Menon
Sr. Director, DDR Memory Controller Group |
Raghavan Menon has more than 14 years of experience leading development teams and a proven track record in delivering complex multi-chip solutions with first silicon success. Raghavan's expertise lies in leading large teams to architect, implement, and successfully deliver next generation ASICs. Most recently, he was Vice President of Engineering and CTO at Covalent Semiconductor Inc. a startup focusing on datapath and switch fabric solutions for the enterprise networking and storage market. Prior to that he was Principal Architect at Vivace Networks, a startup acquired by Tellabs, Inc., focusing on equipment for the future broadband public data network where he was responsible for the switch fabric and traffic management ASICs. Before Vivace, he was a Product Development Lead at PMC-Sierra where he led teams developing switching chips and ATM OAM devices. Raghavan holds an MSEE Honors from the University of Kansas.
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Editorial
Upcoming Events
DAC 2012 at San Francisco CA - Jun 3 - 7, 2012
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